Schottky and MOSFET+Schottky structures, devices, and methods

1. A semiconductor device, comprising:

first trenches containing gate electrodes;

second trenches including field plates, and not gate electrodes;

a first semiconductor mesa containing

an n-type source region,

a p-type body region, and

an n-type drift region;

wherein at least some ones of said gate electrodes are capacitively coupled to selectably invert at least some portions of said body regions;

a second semiconductor mesa containing

a metallic substance which forms a Schottky barrier contact to at least part of an n-type anode region,

a p-type guard region which laterally adjoins said anode region, and

an n-type drift region which lies beneath said anode region;

deep p-type shield diffusions lying within said drift region, and at least partly beneath said trenches; and

an additional n-type doping component, within said drift regions below the depth of said body region;

whereby said shield diffusions reduce electric field at said Schottky barrier, and also at said junction between said source region and said body region.

2. The semiconductor device of claim 1 , wherein said Schottky barrier is provided by a contact between silicon and a metal silicide.

3. The semiconductor device of claim 1 , wherein said Schottky barrier is provided by a contact between a metallic substance and a semiconductor which is doped to less than 10 17 cm −3 .

4. The semiconductor device of claim 1 , wherein said shield diffusions have a minimum net doping concentration of less than 10 16 cm −3 .

5. The semiconductor device of claim 1 , wherein said Schottky barrier is provided by a contact between platinum or titanium silicide and silicon, and is laterally surrounded by a p-type guard ring.

6. The semiconductor device of claim 1 , wherein said shield diffusions have a maximum net doping concentration of more than 10 17 cm −3 p-type.

7. The semiconductor device of claim 1 , wherein said source, body, drift, and drain regions all consist essentially of silicon.

8. The semiconductor device of claim 1 , further comprising a frontside metallization which is electrically connected to said source, to said body, and to a metallic portion of said Schottky barrier.

9. The semiconductor device of claim 1 , further comprising a back side metallization which is electrically connected to said drain and to a metallic portion of said Schottky barrier.

10. A semiconductor device, comprising:

a Schottky barrier metal overlying a mesa of semiconductor material which is doped to less than 10 17 cm −3 n-type;

a p-type guard ring, in said semiconductor material, which laterally surrounds the area of contact between said Schottky barrier metal and said semiconductor material;

at least one isolation trench, flanking said mesa, which has an approximately constant potential;

an additional n-type diffusion component, at intermediate depths within said mesa, which reduces the resistivity of said semiconductor at intermediate depths to less than the resistivity of said semiconductor material near said area of contact; and

at least one p-type shield diffusion, lying at least partly below the bottom of said trench;

whereby said p-type diffusion, in combination with said trench, shapes isopotential contours to provide an increased breakdown voltage.

11. The semiconductor device of claim 10 , wherein said isolation trenches each include a respective field plate.

12. The semiconductor device of claim 10 , wherein said Schottky barrier is provided by a contact between silicon and a metal silicide.

13. The semiconductor device of claim 10 , wherein said Schottky barrier is provided by a contact between a metallic substance and a semiconductor which is doped to less than 10 17 cm −3 .

14. The semiconductor device of claim 10 , wherein said shield diffusions have a minimum net doping concentration of less than 10 16 cm −3 .

15. The semiconductor device of claim 10 , wherein said Schottky barrier is provided by a contact between platinum or titanium silicide and silicon, and is laterally surrounded by a p-type guard ring.

16. The semiconductor device of claim 10 , wherein said shield diffusions have a maximum net doping concentration of more than 10 17 cm −3 p-type.

17. The semiconductor device of claim 10 , wherein said source, body, drift, and drain regions all consist essentially of silicon.

18. The semiconductor device of claim 10 , further comprising a frontside metallization which is electrically connected to said source, to said body, and to a metallic portion of said Schottky barrier.

19. A semiconductor device, comprising:

trench transistors, each including at least an n-type semiconductor source region and a p-type semiconductor body region defining a junction therebetween;

trench diodes, each including a Schottky barrier where a metallic material touches an n-type semiconductor anode region without making ohmic contact;

a termination region, containing at least some n-type intrinsically doped epitaxial semiconductor material, surrounding said trench transistors and trench diodes;

one or more semiconductor drift regions, lying at least partially below said body regions and/or said anode regions;

isolation trenches;

shield diffusions lying at least partly beneath said isolation trenches;

wherein at least some ones of said isolation trenches adjoin both a trench transistor and a trench diode;

wherein ones of said drift regions have a higher net n-type doping at depths near the bottom depth of said isolation trenches, than the doping of said n-type intrinsically doped epitaxial semiconductor material;

and wherein said shield diffusions shape depletion contours, when said transistors are off, to thereby reduce electric field at said Schottky barrier, and also at said junction between said source region and said body region.