IP Library Granted Patent US 8,930,892
Granted Patent B2
US 8,930,892 · App. 14/203,035 · Granted Jan 6, 2015

System and method for computational unification of heterogeneous implicit and explicit processing elements

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Quick Facts
Patent No.
US 8,930,892
App. No.
14/203,035
Granted
Jan 6, 2015
Kind
B2
Abstract

A system and method for computational unification of heterogeneous implicit and explicit processing elements which supports the aggregation of any number of such processing elements. The system and method of the present invention supports the generation of a unified executable program through the use of directive statements which are analyzed in conjunction with the semantic structures in the parsed source code to generate appropriate source code targeted to the implicit and explicit processing elements. The computational unification system and method of the present invention further embodies expertise with the particular programming style and idiom of the various processing elements.

Claims (26)

1. A method for programming a heterogeneous computer system including first and second processors, the method comprising:

adding directives to source code of said first processor to produce first processor source code with directives; and

computationally unifying said first processor source code with directives to produce unified first processor source code and unified second processor source code, wherein said computationally unifying comprises:

analysis and abstraction of said first processor source code with directives to produce statement templates, source code elements and directive parameters,

generating directive based statements from said templates, source code elements and directive parameters to produce directive specific code, and

statement replacing and merging said unified directive specific code and said first processor source code with directives to produce said unified first processor source code and said unified second processor source code.

2. The method of claim 1 wherein said first processor is an implicit device.

3. The method of claim 1 wherein said second processor is an explicit device.

4. The method of claim 1 wherein said step of computationally unifying further comprises producing source code analysis.

5. The method of claim 1 further comprising: compiling said unified first processor source code to produce a first processor executable program.

6. The method of claim 1 further comprising: compiling said unified second processor source code to produce a second processor executable program.

7. The method of claim 1 wherein said step of computationally unifying further comprises the step of:

collecting directive based statements from said directive specific code to produce unified directive specific code.

8. A computer program product, comprising a non-transitory computer usable medium having a computer readable program code embodied therein, said computer readable program code adapted to be executed to implement a method for programming a heterogeneous computer system including first and second processor types, the method comprising:

computer readable program code configured to add directives to source code of said first processor type to produce first processor source code with directives; and

computer readable program code configured to computationally unify said first processor source code with directives to produce unified first processor source code and unified second processor source code, wherein said computer readable program code configured to computationally unify comprises:

computer readable program code configured to analyze and abstract said first processor source code with directives to produce statement templates, source code elements and directive parameters,

computer readable program code configured to generate directive based statements from said templates, source code elements and directive parameters to produce directive specific code, and

computer readable program code configured to statement replace and merge said unified directive specific code and said first processor source code with directives to produce said unified first processor source code and said unified second processor source code.

9. The computer program product of claim 8 wherein said first processor type is an implicit device.

10. The computer program product of claim 8 wherein said second processor type is an explicit device.

11. The computer program product of claim 8 wherein said computer readable program code configured to computationally unify further comprises computer readable program code configured to produce source code analysis.

12. The computer program product of claim 8 further comprising: computer readable program code configured to compile said unified first processor source code to produce a first processor executable program.

13. The computer program product of claim 8 further comprising: computer readable program code configured to compile said unified second processor source code to produce a second processor executable program.

14. The computer program product of claim 8 wherein said computer readable program code configured to computationally unify further comprises:

computer readable program code configured to collect directive based statements from said directive specific code to produce unified directive specific code.

Assignments (5)
RELEASE OF SECURITY INTEREST IN SPECIFIED PATENTS Recorded May 22, 2023
From: BARINGS FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 063723/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2020
From: DIRECTSTREAM LLC
To: FG SRC LLC
Reel/Frame 051615/0344 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2019
From: SAINT REGIS MOHAWK TRIBE
To: DIRECTSTREAM, LLC
Reel/Frame 049251/0855 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2017
From: SRC LABS, LLC
To: SAINT REGIS MOHAWK TRIBE
Reel/Frame 043174/0318 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2016
From: SRC COMPUTERS, LLC
To: SRC LABS, LLC
Reel/Frame 037820/0147 →