IP Library Granted Patent US 9,318,596
Granted Patent B2
US 9,318,596 · App. 14/205,481 · Granted Apr 19, 2016

Ferroelectric field-effect transistor

Inventors: Simone Fabiano (Norrkoping, SE); Xavier Crispin (Kimstad, SE); Magnus Berggren (Vreta Kloster, SE)
Assignee: ACREO SWEDISH ICT AB
H01L29/78H01L29/66477H01L51/052H01L51/0529H01L51/0003
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Quick Facts
Patent No.
US 9,318,596
App. No.
14/205,481
Granted
Apr 19, 2016
Kind
B2
Abstract

A ferroelectric field-effect transistor device includes: a semiconductor layer; a ferroelectric layer; and an ion conductor layer arranged between the semiconductor layer and the ferroelectric layer and in contact with the semiconductor layer. Methods for producing the ferroelectric field-effect transistor device and using the ferroelectric field-effect transistor device in non-volatile memory devices that reduce a readout voltage to a voltage as low as 0.2 V are also disclosed.

Claims (45)

1. A ferroelectric field-effect transistor device, comprising:

a semiconductor layer;

a ferroelectric layer; and

an ion conductor layer arranged between said semiconductor layer and said ferroelectric layer and in contact with the semiconductor layer.

2. The device of claim 1 , further comprising:

a source electrode arranged in electronic contact with the said semiconductor;

a drain electrode arranged in electronic contact with the said semiconductor; and

a gate electrode;

said ferroelectric layer being arranged between said gate electrode and said ion conductor layer.

3. The device of claim 1 , wherein at least one of the semiconductor, the ferroelectric and the ion conductor comprise organic materials.

4. The device of claim 1 , wherein at least one of the semiconductor, the ferroelectric and the ion conductor is appliable by liquid deposition techniques.

5. The device of claim 1 , wherein the semiconductor is selected from the group consisting of semiconducting polymers.

6. The device of claim 1 , wherein the ferroelectric is selected from the group consisting of ferroelectric polymers.

7. The device of claim 1 , wherein the ion conductor is selected from the group consisting of polymeric electrolytes.

8. The device of claim 2 , further comprising a polymeric interlayer, said interlayer being arranged between said gate electrode and said ferroelectric layer.

9. The device of claim 1 , arranged on a substrate.

10. A non-volatile memory device comprising the ferroelectric field-effect transistor device of claim 1 .

11. Method of producing a ferroelectric field-effect transistor device, comprising:

providing a substrate;

applying a semiconductor layer;

applying a ferroelectric layer; and

applying an ion conductor layer;

wherein said ion conductor layer is arranged between said semiconductor layer and said ferroelectric layer and in contact with the semiconductor layer.

12. The method according to claim 11 , further comprising:

applying a source electrode to the substrate;

applying a drain electrode to the substrate;

applying the semiconductor layer in electronic contact with said source and drain electrodes;

applying the ion conductor layer to the semiconductor layer;

applying the ferroelectric layer to the ion conductor layer; and

applying a gate electrode to the ferroelectric layer.

13. The method according to claim 11 , further comprising:

applying a gate electrode to the substrate;

applying the ferroelectric layer to the gate electrode;

applying the ion conductor layer to the ferroelectric layer;

applying the semiconductor layer to the ion conductor layer;

applying a source electrode in electronic contact with the said semiconductor; and

applying a drain electrode in electronic contact with the said semiconductor.

14. The method of claim 12 , further comprising applying a polymeric interlayer between said gate electrode and said ferroelectric layer.

15. The method of claim 11 , wherein the semiconductor layer, the ferroelectric layer and the ion conductor layer are applied by liquid deposition techniques.

16. The method of claim 11 , wherein said substrate is a solid substrate.

17. A method, comprising:

outputting, using an ion conductor layer between a ferroelectric layer and a semiconductor layer of a ferroelectric field-effect transistor device, readout voltage of a non-volatile memory device including the ferroelectric field-effect transistor device to a voltage as low as 0.2 V.

18. The device of claim 9 , wherein the substrate is a flexible solid substrate.

19. A non-volatile memory device comprising the ferroelectric field-effect transistor device of claim 2 .

20. The method of claim 16 , wherein the solid substrate is a flexible solid substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2014
From: FABIANO, SIMONE; CRISPIN, XAVIER; BERGGREN, MAGNUS
To: ACREO SWEDISH ICT AB
Reel/Frame 032866/0858 →
Priority Claims (1)
EP 13159493 · Mar 15, 2013 · regional
Continuity (2)
Provisional Application 61788049 · Mar 15, 2013
Related Publication 20140264515A1 · Sep 18, 2014