IP Library Granted Patent US 9,123,588
Granted Patent B2
US 9,123,588 · App. 14/206,858 · Granted Sep 1, 2015

Thin-film transistor circuit substrate and method of manufacturing the same

Inventors: Tetsuya Shibata (Yokkaichi, JP); Hajime Watakabe (Fukaya, JP); Atsushi Sasaki (Ageo, JP); Yuki Matsuura (Kuki, JP); Muneharu Akiyoshi (Saitama, JP); Hiroyuki Watanabe (Sunto-gun, JP)
Assignee: JAPAN DISPLAY INC.
H01L27/1225H01L29/66969H01L29/7869H01L29/78606
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Quick Facts
Patent No.
US 9,123,588
App. No.
14/206,858
Granted
Sep 1, 2015
Kind
B2
Abstract

According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

Claims (12)

1. A display device comprising:

an oxide semiconductor thin film including a first region, and a second region and a third region which are formed on both sides of the first region and have a lower resistance than the first region;

a gate electrode opposed to the first region;

a gate insulation film positioned between the oxide semiconductor thin film and the gate electrode;

a first interlayer insulation film of silicon nitride, which covers the second region and the third region of the oxide semiconductor thin film and the gate electrode;

a source electrode which is in contact with the second region; and

a drain electrode which is in contact with the third region,

wherein in the first interlayer insulation film covering the second region and the third region, an oxygen concentration of an end portion which is in contact with the oxide semiconductor thin film is higher than an oxygen concentration of a central portion which is located at a position corresponding to ½ of a thickness of the first interlayer insulation film.

2. The display device according to claim 1 , wherein in the oxide semiconductor thin film, an oxygen concentration of the second region and the third region is lower than an oxygen concentration of the first region.

3. The display device according to claim 1 , wherein the first interlayer insulation film includes, at least in the end portion, dangling bonds of silicon.

4. The display device according to claim 3 , wherein in the first interlayer insulation film, a central portion which is located at a position corresponding to ½ of a thickness of the first interlayer insulation film includes a greater number of dangling bonds of silicon than the end portion.

5. The display device according to claim 1 , wherein the oxide semiconductor thin film is formed of an oxide including at least one of indium (In), gallium (Ga), and zinc (Zn).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (1)
JP 2011-025072 · Feb 8, 2011 · national
Continuity (2)
Division 13329545 · Dec 19, 2011
Related Publication 20140191231A1 · Jul 10, 2014