IP Library Granted Patent US 9,219,122
Granted Patent B2
US 9,219,122 · App. 14/208,784 · Granted Dec 22, 2015

Silicon carbide semiconductor devices

Inventors: Michael MacMillan (Rancho Santa Margarita, CA); Utpal K. Chakrabarti (Allentown, PA)
Assignee: Global Power Technologies Group, Inc.
H01L29/1608H01L21/02236H01L21/02255H01L21/045H01L21/049H01L29/167H01L29/36H01L29/66068H01L29/7802
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Quick Facts
Patent No.
US 9,219,122
App. No.
14/208,784
Granted
Dec 22, 2015
Kind
B2
Abstract

Methods, systems, and devices are disclosed for thermal processing of silicon carbide semiconductor devices. In one aspect, a method for fabricating a silicon carbide semiconductor device includes forming a thin epitaxial layer of a nitrogen and phosphorous co-doped SiC material on a SiC epitaxial layer formed on a SiC substrate, and thermally growing an oxide layer to form an insulator material on the nitrogen and phosphorous co-doped SiC epitaxial layer, in which the thermally growing the oxide layer results in at least partially consuming the nitrogen and phosphorous co-doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen and phosphorous between the SiC epitaxial layer and the oxide layer.

Claims (20)

1. A method for fabricating a silicon carbide (SiC) semiconductor device, comprising:

forming a thin epitaxial layer of a nitrogen and phosphorous co-doped SiC material on a SiC epitaxial layer formed on a SiC substrate, the nitrogen and phosphorous co-doped SiC epitaxial layer having a first thickness; and

thermally growing an oxide layer to form an insulator material on the nitrogen and phosphorous co-doped SiC epitaxial layer to at least partially consume the nitrogen and phosphorous co-doped SiC epitaxial layer in the oxide layer to produce an interface including nitrogen and phosphorous between the SiC epitaxial layer and the oxide layer, wherein the at least partially consuming of the nitrogen and phosphorous co-doped SiC epitaxial layer causes the nitrogen and phosphorous co-doped SiC epitaxial layer to have a second thickness smaller than the first thickness.

2. The method as in claim 1 , wherein the insulator material includes silicon oxide.

3. The method as in claim 1 , wherein the oxide layer is grown at a high temperature within a range from 900° C. to 1200° C. in an oxidizing environment.

4. The method as in claim 1 , wherein the nitrogen and phosphorous co-doped SiC epitaxial layer has a thickness less than 500 nm.

5. The method as in claim 1 , wherein the nitrogen and phosphorous co-doped SiC material has a carrier concentration greater than 1×10 18 cm −3 for either or both the nitrogen and the phosphorous.

6. The method as in claim 1 , further comprising forming one or more transistor structures over the insulator material of the oxide layer.

7. The method as in claim 1 , wherein the thermally growing of the oxide layer includes forming the oxide layer and the interface including nitrogen and phosphorous between the SiC epitaxial layer and the oxide layer in a single step.

8. A method for fabricating a SiC semiconductor device, comprising:

forming a thin epitaxial layer of a nitrogen and phosphorous co-doped SiC material on a SiC epitaxial layer formed on a SiC substrate, the nitrogen and phosphorous co-doped SiC epitaxial layer having a first thickness;

thermally growing an oxide layer to form an insulator material on the nitrogen and phosphorous co-doped SiC epitaxial layer; and

providing a boron compound during the thermally growing of the oxide layer,

wherein the thermally growing the oxide layer results in at least partially consuming the nitrogen and phosphorous co-doped SiC epitaxial layer and the boron compound in the oxide layer to produce an interface including nitrogen, phosphorous, and boron between the SiC epitaxial layer and the oxide layer, and wherein after the thermally growing of the oxide layer, the nitrogen and phosphorous co-doped SiC epitaxial layer has a second thickness smaller than the first thickness.

9. The method as in claim 8 , wherein the insulator material includes silicon oxide.

10. The method as in claim 8 , wherein the oxide layer is grown at a high temperature within a range from 900° C. to 1200° C. in an oxidizing environment.

11. The method as in claim 8 , wherein the nitrogen and phosphorous co-doped SiC epitaxial layer has a thickness less than 500 nm.

12. The method as in claim 8 , wherein the boron compound includes one or more of H 3 BO 4 , B 2 O 3 , B 2 H 6 , or organo-metalic boron compounds including tri-methly borate or tri-etheyl borate.

13. The method as in claim 8 , further comprising forming one or more transistor structures over the insulator material of the oxide layer.

14. The method as in claim 8 , wherein the thermally growing of the oxide layer includes forming the oxide layer and the interface including nitrogen, phosphorous, and boron between the SiC epitaxial layer and the oxide layer in a single step.

Assignments (4)
CHANGE OF NAME Recorded Oct 17, 2020
From: GLOBAL POWER TECHNOLOGIES GROUP, INC.
To: SEMIQ INCORPORATED
Reel/Frame 054105/0990 →
CHANGE OF NAME Recorded Dec 11, 2019
From: GLOBAL POWER TECHNOLOGIES GROUP, INC.
To: SEMIQ INCORPORATED
Reel/Frame 051255/0852 →
CHANGE OF NAME Recorded Jul 21, 2015
From: GLOBAL POWER DEVICE COMPANY
To: GLOBAL POWER TECHNOLOGIES GROUP, INC.
Reel/Frame 036140/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2014
From: MACMILLAN, MICHAEL; CHAKRABARTI, UTPAL K.
To: GLOBAL POWER DEVICE COMPANY
Reel/Frame 032498/0667 →
Continuity (2)
Provisional Application 61780615 · Mar 13, 2013
Related Publication 20140264382A1 · Sep 18, 2014