Adhesion layer to minimize dielectric constant increase with good adhesion strength in a PECVD process
Embodiments of the present invention provide a film stack and method for depositing an adhesive layer for a low dielectric constant bulk layer without the need for an initiation layer. A film stack for use in a semiconductor device comprises of a dual layer low-K dielectric deposited directly on an underlying layer. The dual low-K dielectric consists of an adhesive layer deposited without a carbon free initiation layer.
1. A film stack for use in a semiconductor device comprising:
a dual layer low-K dielectric deposited directly on an underlying layer without the formation of an intervening layer, wherein the dual layer low-K dielectric has a thickness less than 50 Å, the dual layer low-K dielectric consisting of:
an adhesion layer; and
a bulk layer.
2. The film stack of claim 1 wherein the adhesion layer further comprises:
a gradual increase in a carbon content.
3. The film stack of claim 1 wherein the adhesion layer and the bulk layer are formed in a continuous deposition process.
4. The film stack of claim 1 wherein the adhesion layer has a thickness less than 40 Å.
5. The film stack of claim 1 wherein at the surface of the adhesion layer formed on the underlying layer, there is a carbon content greater than 0% in the bottom surface of the adhesion layer.
6. The film stack of claim 1 wherein the bulk layer has a bulk layer thickness less than 10 Å.
7. The film stack of claim 1 wherein the dual layer low-K dielectric has a bond strength to the underlying layer of 6.3 J/m 2 or more.
8. The film stack of claim 1 , wherein a methyldiethoxysilane (MDEOS) precursor is utilized to deposit the adhesion layer.
9. The film stack of claim 8 , wherein an alpha-terpinene (ATRP) precursor is utilized to deposit the adhesion layer.
10. The film stack of claim 8 , wherein helium (He) is used as a carrier gas to deposit the adhesion layer.
11. A method for depositing a nano-porous low-K dielectric layer directly on a film stack comprising:
supplying a Si-rich precursor and a C-rich precursor to a deposition chamber;
varying a mixture of the Si-rich precursor and the C-rich precursor gradually during a deposition of an adhesive layer on an underlying layer; and
depositing a bulk layer on the adhesive layer with a fixed ratio of the Si-rich precursor and a C-rich precursor, wherein the nano-porous low-K dielectric layer has a thickness less than 50 Å.
12. The method of claim 11 , wherein the nano-porous low-K dielectric layer is a dual damascene structure.
13. The method of claim 11 wherein the adhesive layer has an adhesive layer thickness of less than 40 Å.
14. The method of claim 11 wherein the Si-rich precursor is methyldiethoxysilane (MDEOS) and the C-rich precursor is alpha-terpinene (ATRP).
15. A non-transitory computer-readable storage medium storing code for execution by a central processing unit (CPU), wherein a code, when executed by a CPU, performs an operation for depositing a nano-porous low-K dielectric layer directly on a film stack comprising:
supplying a Si-rich precursor and a C-rich precursor to a deposition chamber;
varying a mixture of the Si-rich precursor and the C-rich precursor gradually during a deposition of an adhesive layer on an underlying layer; and
depositing a bulk layer on the adhesive layer while not changing the mixture, wherein the nano-porous low-K dielectric layer has a thickness less than 50 Å.
16. The non-transitory computer-readable storage medium claim 15 , wherein the nano-porous low-K dielectric layer is a dual damascene structure.
17. The non-transitory computer-readable storage medium claim 15 wherein the adhesive layer has an adhesive layer thickness less than 40 Å.
18. The non-transitory computer-readable storage medium claim 15 wherein the Si-rich precursor is methyldiethoxysilane (MDEOS) and the C-rich precursor is alpha-terpinene (ATRP).