IP Library › Granted Patent US 9,471,123
Granted Patent B2
US 9,471,123 · App. 14/213,646 · Granted Oct 18, 2016

Reducing unnecessary power consumed by peripheral devices while displaying a moving image

Inventors: Tetsuo Hiraki (Kawasaki, JP); Hiromasa Yamauchi (Usakos, JP); Koichiro Yamashita (Hachioji, JP); Fumihiko Hayakawa (Kawasaki, JP); Naoki Odate (Akiruno, JP); Takahisa Suzuki (Yokohama, JP); Koji Kurihara (Kawasaki, JP)
Assignee: Fujitsu Limited
G06F1/266G06F1/3228G06F1/3265H04M1/72561H04W52/0251Y02B60/1242
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Quick Facts
Patent No.
US 9,471,123
App. No.
14/213,646
Granted
Oct 18, 2016
Kind
B2
Abstract

A power supply control method includes detecting that a result of a first function performed by a first device ceases to be displayed on a display screen; suspending power supply to the first device and supplying power to a second device, based on a detection of the result ceasing to be displayed; and causing the second device to output a response signal to a CPU in response to a control signal from the CPU.

Claims (23)

1. A power supply control method comprising:

detecting that a result of a first function performed by a first device ceases to be displayed on a display screen;

suspending power supply to the first device and supplying power to a second device, based on a detection of the result ceasing to be displayed;

calculating, based on given information, a timing for supplying power to the second device, wherein the given information includes any one among scroll information and window action control information; and

causing the second device to output a response signal to a CPU in response to a control signal from the CPU, wherein the response signal includes an ack signal when a task related to the first function is executed or a nak signal when the task related to the first function fails to execute,

wherein the suspending power supply to the first device and supplying power to the second device is based on the response signal.

2. The power supply control method according to claim 1 , wherein the response signal is outputted by either one of the first device or the second device.

3. The power supply control method according to claim 1 , wherein the calculating of the timing includes calculating the timing by taking into consideration, a timing for giving a power supply instruction.

4. The power supply control method according to claim 1 , wherein the scroll information includes any one among a scroll method and scroll speed.

5. The power supply control method according to claim 1 , further comprising calculating, based on the given information, a timing for resuming power supply to the first device.

6. A system comprising:

a CPU;

a first peripheral device connected to the CPU via a bus; and

a second peripheral device that is started when the first peripheral device is suspended and responds to a control signal from the CPU by a method by which the first peripheral device responds to the control signal,

wherein the second peripheral device responds to the control signal by outputting a response signal to the CPU, the response signal including an ack signal when a task related to a function performed by the first peripheral device is executed or a nak signal when the task related to the function performed by the first peripheral device fails to execute,

wherein the first peripheral device is suspended and the second peripheral device is started based on the response signal,

wherein the CPU calculates, based on given information, a timing for starting the second peripheral device, the given information including any one among scroll information and window action control information.

7. The system according to claim 6 , wherein

the second peripheral device includes a first register to which information supplied from the first peripheral device to the CPU is written.

8. The system according to claim 6 , wherein

the second peripheral device includes a second register for which a channel that is a channel set between the CPU and the first peripheral device is set.

9. The system according to claim 6 , wherein

the CPU calculates a timing for restarting the first peripheral device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2016
From: HIRAKI, TETSUO; YAMAUCHI, HIROMASA; YAMASHITA, KOICHIRO; HAYAKAWA, FUMIHIKO; ODATE, NAOKI; SUZUKI, TAKAHISA; KURIHARA, KOJI
To: FUJITSU LIMITED
Reel/Frame 039744/0209 →
Continuity (2)
Continuation PCTJP2011071153 · Sep 15, 2011
Related Publication 20140201546A1 · Jul 17, 2014