IP Library Granted Patent US 9,823,930
Granted Patent B2
US 9,823,930 · App. 14/213,730 · Granted Nov 21, 2017

Method for emulating a guest centralized flag architecture by using a native distributed flag architecture

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Quick Facts
Patent No.
US 9,823,930
App. No.
14/213,730
Granted
Nov 21, 2017
Kind
B2
Abstract

A method for emulating a guest centralized flag architecture by using a native distributed flag architecture. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks; scheduling the instructions of the instruction block to execute in accordance with a scheduler; and using a distributed flag architecture to emulate a centralized flag architecture for the emulation of guest instruction execution.

Claims (27)

1. A method for emulating a guest centralized flag architecture by using a native distributed flag architecture, comprising:

receiving an incoming instruction sequence using a global front end;

grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks, wherein each half block is configured to be dispatched independently;

scheduling the instructions of the instruction block to execute in accordance with a scheduler; and

using a distributed flag architecture to emulate a centralized guest flag architecture for the emulation of guest instruction execution.

2. The method of claim 1 , wherein a distributed flag architecture is configured to be implemented by using multiple independent flag registers.

3. The method of claim 1 , wherein, guest instructions are categorized into 4 native instruction types.

4. The method of claim 1 , wherein guest instructions are categorized into 4 native instruction types and guest instruction types update different guest instruction flags, based on their type.

5. The method of claim 1 , wherein a front end dynamic converter categorizes incoming instructions based on the manner in which they update guest instruction flags.

6. A non-transitory computer readable media having computer readable code which when executed by a computer system causes the computer system to perform a method for emulating a guest centralized flag architecture by using a native distributed flag architecture, comprising:

receiving an incoming instruction sequence using a global front end;

grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks, wherein each half block is configured to be dispatched independently;

scheduling the instructions of the instruction block to execute in accordance with a scheduler; and

using a distributed flag architecture to emulate a centralized guest flag architecture for the emulation of guest instruction execution.

7. The computer readable media of claim 6 , wherein a distributed flag architecture is configured to be implemented by using multiple independent flag registers.

8. The computer readable media of claim 6 , wherein guest instructions are categorized into 4 native instruction types.

9. The computer readable media of claim 6 , wherein guest instructions are categorized into 4 native instruction types and guest instruction types update different guest instruction flags, based on their type.

10. The computer readable media of claim 6 , wherein a front end dynamic converter categorizes incoming instructions based on the manner in which they update guest instruction flags.

11. A computer system having a processor coupled to a memory, the memory having computer readable code which when executed by the computer system causes the computer system to implement a method for emulating a guest centralized flag architecture by using a native distributed flag architecture, comprising:

receiving an incoming instruction sequence using a global front end;

grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks, wherein each half block is configured to be dispatched independently;

scheduling the instructions of the instruction block to execute in accordance with a scheduler; and

using a distributed flag architecture to emulate a centralized guest flag architecture for the emulation of guest instruction execution.

12. The computer system of claim 11 , wherein a distributed flag architecture is configured to be implemented by using multiple independent flag registers.

13. The computer system of claim 11 , wherein, guest instructions are categorized into 4 native instruction types.

14. The computer system of claim 11 , wherein guest instructions are categorized into 4 native instruction types and guest instruction types update different guest instruction flags, based on their type.

15. The computer system of claim 11 , wherein a front end dynamic converter categorizes incoming instructions based on the manner in which they update guest instruction flags.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2016
From: SOFT MACHINES, INC.
To: INTEL CORPORATION
Reel/Frame 040631/0915 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2014
From: ABDALLAH, MOHAMMAD
To: SOFT MACHINES, INC.
Reel/Frame 032446/0820 →