Coreless integrated circuit packaging system and method of manufacture thereof
View Patent ↗A system and method for manufacturing an integrated circuit packaging system includes: forming a base substrate including: providing a sacrificial carrier: mounting a metallic sheet on the sacrificial carrier, applying a top trace to the metallic sheet, forming a conductive stud on the top trace, forming a base encapsulation over the metallic sheet, the top trace, and the conductive stud, the top trace exposed from a top surface of the base encapsulation, and removing the sacrificial carrier and the metallic sheet; mounting an integrated circuit device on the base substrate; and encapsulating the integrated circuit device and the base substrate with a top encapsulation.
1. An integrated circuit packaging system comprising:
a base substrate, the base substrate includes:
a base encapsulation,
a top trace embedded in the base encapsulation, the top trace coplanar with a top surface of the base encapsulation, and
a conductive stud on the top trace, the conductive stud embedded in the base encapsulation, the conductive stud coplanar with the top trace;
a system interconnect in direct contact with the conductive stud and in direct contact with the base encapsulation, a portion of the system interconnect embedded within the base encapsulation;
an integrated circuit device on the base substrate; and
a top encapsulation encapsulating the base substrate and the integrated circuit device.
2. The system as claimed in claim 1 wherein the conductive stud includes a bottom recess and a peripheral groove.
3. The system as claimed in claim 1 further comprising a redistribution layer between the base substrate and the integrated circuit device.
4. The system as claimed in claim 1 further comprising a stacked device mounted on the integrated circuit device.
5. The system as claimed in claim 1 further comprising a mold overlap between the base substrate and the top encapsulation.