Highly-spectrally-efficient receiver
A receiver may be operable to receive a QAM-based, inter-symbol correlated (ISC) signal having pilot overhead of 5% at a signal-to-noise ratio (SNR). The receiver may be operable to process the QAM-based, ISC signal to output information at a particular rate with a symbol error rate lower than or equal to 1e-2. The first SNR may be at least 3 dB below a SNR required to achieve the same particular information rate and the same symbol error rate while processing a signal having zero inter-symbol interference.
1. A system comprising:
circuitry for use in an electronic receiver, wherein said circuitry comprises a nonlinearity modeling circuit and sequence estimation circuit, and said circuitry is operable to:
receive an inter-symbol correlated (ISC) signal that is characterized by a particular amount of nonlinear distortion and particular amount of white noise and that complies with European Telecommunications Standards Institute (ETSI) standard EN 302 217;
determine, via said nonlinearity modeling circuit, a nonlinearity model that, when applied to a signal, introduces said particular amount of nonlinear distortion;
demodulate said ISC signal using said nonlinearity model to achieve a symbol error rate (SER) of less than 10 −2 and/or a bit error rate (BER) of less than 10 −6 .
2. The system of claim 1 wherein said particular amount of nonlinear distortion is greater than the equivalent white noise power of the capacity limit minus 8 dB.
3. The system of claim 1 wherein said particular amount of white noise is less than 4 dB from the equivalent white noise power of the capacity limit.
4. The system of claim 1 , wherein, the received signal distorted by phase noise.
5. The system of claim 1 , wherein said ISC signal comprises pilot symbols with a pilot overhead of less than 10%.
6. The system of claim 1 , wherein said ISC signal is characterized by a signal-to-noise and distortion ratio of less than or equal to 6 dB above the signal to noise ratio of the capacity limit.
7. The system of claim 1 , wherein said ISC signal carries quadrature amplitude modulated (QAM) symbol.
8. The system of claim 1 , wherein:
said circuitry comprises a pulse shaping filter having a response that does not have a square root-raised cosine response; and
said reception of said ISC signal is via said pulse shaping filter.
9. The system of claim 1 , wherein;
said circuitry comprises a sequence estimation circuit; and
said demodulation is via said sequence estimation circuit.
10. The system of claim 9 , wherein:
said circuitry comprises an equalizer circuit; and
an output of said nonlinearity modeling circuit is an input to said equalizer circuit.
11. The system of claim 1 , wherein:
a signal generated by said sequence estimation circuit is an input of said nonlinearity modeling circuit.