Adaptive nonlinear current observer for boost PFC AC/DC converters

1. A power factor correction boost converter with a current transformer, the converter comprising:

a diode bridge coupled between a first coupling node and a second coupling node;

an inductor coupled between said first coupling node and a third coupling node;

a power semiconductor subcircuit coupled between said third coupling node and said second coupling node;

an output diode coupled between said third coupling node and a positive output node;

a control subsystem for controlling said first and second power semiconductor subcircuits, said control subsystem having as input an output voltage of said converter, and an input voltage of said converter, said output voltage being between said positive output node and said second coupling node, said input voltage being between said first coupling node and said second coupling node, said control system comprising:

an adaptive observer subcircuit for estimating an inductor current and said output voltage;

wherein said adaptive observer subcircuit comprises an auxiliary compensation block for resetting an integrator in said observer circuit when an input voltage waveform for said converter crosses zero with a negative slope.

2. A converter according to claim 1 wherein said adaptive observer subcircuit implements:

x

^

.

1

=

1

L

⁢

v

in

-

1

L

⁢

u

⁢

x

^

2

+

(

1

C

BUS

-

1

L

)

⁢

(

x

2

-

x

^

2

)

⁢

u

where

{dot over ({circumflex over (x)} 1 is an updated estimate for an inductor current;

x 2 is the output voltage between said positive output node and said negative output node;

{circumflex over (x)} 2 is an estimate for said output voltage;

u is a value related to a duty ratio of said input;

L is an inductance of said converter; C BUS is an output capacitance of said converter; and

v in is the input voltage between said first coupling point and said second coupling point.

3. A converter according to claim 1 wherein said adaptive observer subcircuit implements:

x

^

.

2

=

1

C

BUS

⁢

u

⁢

x

^

1

-

θ

^

⁢

x

^

2

+

ϑ

⁡

(

x

2

-

x

^

2

)

where

{dot over ({circumflex over (x)} 2 is an updated estimate for an output voltage between said positive output node and said negative output node;

x 2 is said output voltage;

{circumflex over (x)} 2 is an estimate for said output voltage;

{circumflex over (x)} 1 is an estimate for an inductor current;

θ is a positive real coefficient;

{circumflex over (θ)} is an estimated value based on {circumflex over (x)} 2 and θ;

u is a value related to a duty ratio of said input; and

C BUS is an output capacitance of said converter.

4. A converter according to claim 1 wherein said control subsystem further comprises a subcircuit for estimating a value for

1

C

BUS

⁢

R

L

,

said estimate being based on:

{dot over ({circumflex over (θ)}=−μ {tilde over (x)} 2 {circumflex over (x)} 2

where

R L is a load resistance;

{dot over ({circumflex over (θ)} is an updated estimate for a value for

1

C

BUS

⁢

R

L

;

x 2 is an output voltage between said positive output node and said negative output node;

{tilde over (x)} 2 is an estimated error for x 2 ;

{circumflex over (x)} 2 is an estimate for said output voltage;

μ is a positive constant value; and

C BUS is an output capacitance of said converter.

5. A converter according to claim 1 wherein said auxiliary compensation block extracts a low frequency ripple of said output voltage of said converter.

6. A converter according to claim 5 wherein said auxiliary compensation block comprises:

a constant multiplier block receiving an input to said auxiliary compensation block, said input being said output voltage of said converter;

a discrete differentiator block receiving an output of said multiplier block, said discrete differentiator being for;

a comparator receiving an output of said differentiator block;

a latch receiving an output of said comparator, said latch being triggered whenever said output voltage of said converter crosses zero with a negative slope.

7. An adaptive nonlinear observer circuit for estimating an inductor current and an output voltage of a power factor correction (PFC) boost converter, the observer circuit comprising:

plurality of summing blocks;

a plurality of multiplication blocks;

a plurality of coefficient blocks;

wherein said blocks implement:

x

^

.

1

=

1

L

⁢

v

in

-

1

L

⁢

u

⁢

x

^

2

+

(

1

C

BUS

-

1

L

)

⁢

(

x

2

-

x

^

2

)

⁢

u

,

⁢

x

^

.

2

=

1

C

BUS

⁢

u

⁢

x

^

1

-

θ

^

⁢

x

^

2

+

ϑ

⁡

(

x

2

-

x

^

2

)

,

and

{dot over ({circumflex over (θ)}=−μ {tilde over (x)} 2 {circumflex over (x)} 2

where

{dot over ({circumflex over (x)} 1 is an updated estimate for an inductor current of said converter;

{dot over ({circumflex over (x)} 2 is an updated estimate for an output voltage between a positive output node and a negative output node of said converter;

x 2 is the output voltage of said converter;

{circumflex over (x)} 2 is an estimate for said output voltage;

{circumflex over (x)} 1 is an estimate for said inductor current of said converter;

u is a value related to a duty ratio of said input;

L is an inductance of said converter;

C BUS is an output capacitance of said converter; and

v in is the input voltage between said first coupling point and said second coupling point

{tilde over (x)} 2 is an estimated error of x 2 ;

{circumflex over (θ)} is an estimated value based on {circumflex over (x)} 2 and {tilde over (x)} 2 ;

R L is a load resistance;

{dot over ({circumflex over (θ)} is an updated estimate for a value for

1

C

BUS

⁢

R

L

;

υ is a positive real coefficient; and

μ is a positive constant value.

8. An adaptive observer circuit wherein {dot over ({circumflex over (θ)}=−μ{tilde over (x)} 2 {circumflex over (x)} 2 is implemented as a subcircuit of said adaptive observer circuit.

9. An adaptive nonlinear observer circuit according to claim 7 wherein said observer circuit further comprises an auxiliary compensation block for resetting an integrator in said observer circuit when an input voltage waveform for said converter crosses zero with a negative slope.

10. An adaptive nonlinear observer circuit according to claim 9 wherein said auxiliary compensation block extracts a low frequency ripple of said output voltage of said converter.

11. An observer circuit according to claim 10 wherein said auxiliary compensation block comprises:

a constant multiplier block receiving an input to said auxiliary compensation block, said input being said output voltage of said converter;

a discrete differentiator block receiving an output of said multiplier block, said discrete differentiator being for;

a comparator receiving an output of said differentiator block;

a latch receiving an output of said comparator, said latch being triggered whenever said output voltage of said converter crosses zero with a negative slope.

12. A method for estimating an inductor current and an output voltage for a power factor correction boost converter, the method comprising:

a) determining an input voltage for said converter;

b) determining an output voltage for said converter;

c) determining an output capacitance for said converter;

d) determining an inductance for said converter;

e) continuously estimating said output voltage based on a previous reading of said output voltage;

f) continuously estimating said inductor current based on estimates of said output voltage;

wherein steps e) and f) are executed using:

x

^

.

1

=

1

L

⁢

v

in

-

1

L

⁢

u

⁢

x

^

2

+

(

1

C

BUS

-

1

L

)

⁢

(

x

2

-

x

^

2

)

⁢

u

;

x

^

.

2

=

1

C

BUS

⁢

u

⁢

x

^

1

-

θ

^

⁢

x

^

2

+

ϑ

⁡

(

x

2

-

x

^

2

)

;

and

{dot over ({circumflex over (θ)}=−μ {circumflex over (x)} 2 {circumflex over (x)} 2

where

{dot over ({circumflex over (x)} 1 is an updated estimate for said inductor current of said converter;

{dot over ({circumflex over (x)} 2 is an updated estimate for said PFC output voltage, said output voltage being between a positive output node and a negative output node of said converter;

x 2 is said output voltage;

{circumflex over (x)} 2 is an estimate for said PFC output voltage;

{circumflex over (x)} 1 is an estimate for said inductor current of said converter;

u is a value related to a duty ratio of said input;

L is an inductance of said converter;

C BUS is an output capacitance of said converter;

v in is the input voltage between said first coupling point and said second coupling point;

{tilde over (x)} 2 is an estimated error of x 2 ;

{circumflex over (θ)} is an estimated value based on {circumflex over (x)} 2 and {tilde over (x)} 2

R L is a load resistance;

{dot over ({circumflex over (θ)} is an updated estimate for a value for

1

C

BUS

⁢

R

L

;

υ is a positive real coefficient; and

μ is a positive constant value.

13. A method according to claim 12 further comprising resetting an integrator in an observer circuit in a control system controlling said converter, said integrator being reset when an input voltage waveform for said converter crosses zero with a negative slope.

14. A method according to claim 13 further comprising extracting a low frequency ripple of said output voltage of said converter to determine when to reset said integrator.

15. A power factor correction boost converter with a current transformer, the converter comprising:

a diode bridge coupled between a first coupling node and a second coupling node;

a first inductor coupled between said first coupling node and a third coupling node;

a first power semiconductor subcircuit coupled between said third coupling node and said second coupling node;

a first output diode coupled between said third coupling node and a positive output node;

a second inductor coupled between said first coupling node and a fourth coupling node;

a second output diode coupled between said fourth coupling node and said positive output node;

a second power semiconductor subcircuit coupled between said second coupling node and said fourth coupling node;

a control subsystem for controlling said first and second power semiconductor subcircuits, said control subsystem having as input an output voltage of said converter, and an input voltage of said converter, said output voltage being between said positive output node and said second coupling node, said input voltage being between said first coupling node and said second coupling node, said control system comprising:

an adaptive observer subcircuit for estimating an inductor current and said output voltage.

16. A power factor correction boost converter according to claim 15 wherein said adaptive observer circuit implements:

x

^

.

1

=

1

L

⁢

v

in

-

1

L

⁢

u

⁢

x

^

2

+

(

1

C

BUS

-

1

L

)

⁢

(

x

2

-

x

^

2

)

⁢

u

,

⁢

x

^

.

2

=

1

C

BUS

⁢

u

⁢

x

^

1

-

θ

^

⁢

x

^

2

+

ϑ

⁡

(

x

2

-

x

^

2

)

,

and

{dot over ({circumflex over (θ)}=−μ {tilde over (x)} 2 {circumflex over (x)} 2

where

{dot over ({circumflex over (x)} 1 is an updated estimate for an inductor current of said converter;

{dot over ({circumflex over (x)} 2 is an updated estimate for an output voltage between a positive output node and a negative output node of said converter;

x 2 is the output voltage of said converter;

{circumflex over (x)} 2 is an estimate for said output voltage;

{circumflex over (x)} 1 is an estimate for said inductor current of said converter;

u is a value related to a duty ratio of said input;

L is an inductance of said converter;

C BUS is an output capacitance of said converter; and

v in is the input voltage between said first coupling point and said second coupling point

{tilde over (x)} 2 is an estimated error of x 2 ;

{circumflex over (θ)} is an estimated value based on {circumflex over (x)} 2 and {tilde over (x)} 2 ;

R L is a load resistance;

{dot over ({circumflex over (θ)} is an updated estimate for a value for

1

C

BUS

⁢

R

L

;

υ is a positive real coefficient; and

μ is a positive constant value.

17. A power factor correction boost converter according to claim 15 wherein said adaptive observer circuit further comprises an auxiliary compensation block for resetting an integrator in said observer circuit when an input voltage waveform for said converter crosses zero with a negative slope.

18. A power factor correction boost converter according to claim 17 wherein said auxiliary compensation block comprises:

a constant multiplier block receiving an input to said auxiliary compensation block, said input being said output voltage of said converter;

a discrete differentiator block receiving an output of said multiplier block, said discrete differentiator being for;

a comparator receiving an output of said differentiator block;

a latch receiving an output of said comparator, said latch being triggered whenever said output voltage of said converter crosses zero with a negative slope.

19. A power factor correction boost converter according to claim 17 wherein said adaptive observer circuit wherein said auxiliary compensation block extracts a low frequency ripple of said output voltage of said converter.