IP Library Granted Patent US 8,951,832
Granted Patent B2
US 8,951,832 · App. 14/216,068 · Granted Feb 10, 2015

Variable-resistance material memories and methods

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Quick Facts
Patent No.
US 8,951,832
App. No.
14/216,068
Granted
Feb 10, 2015
Kind
B2
Abstract

Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted along the edge by electrodes. Processes include the formation of the bottom spacer electrodes as well as the variable-resistance material memory spacer cells. Devices include the variable-resistance memory cells.

Claims (33)

1. A method of forming a memory device, comprising:

forming a dielectric on a semiconductive substrate;

forming a first electrode against the dielectric;

forming a variable resistance material coupled to the first electrode, wherein a first minor-axis surface of the first electrode forms an interface with the variable resistance material, and wherein forming the variable resistance material coupled to the first electrode includes placing the variable resistance material in a trench adjacent to the first electrode; and

forming a second electrode coupled to the variable resistance material.

2. The method of claim 1 , wherein forming the dielectric includes forming a dielectric mesa.

3. The method of claim 1 , wherein forming the first electrode includes forming a tungsten electrode.

4. The method of claim 1 , wherein forming the first electrode includes forming a metal nitride electrode.

5. The method of claim 1 , wherein forming the second electrode coupled to the variable resistance material includes etching the second electrode an the variable resistance material at the same time.

6. A method of forming a memory device, comprising:

forming a dielectric on a semiconductive substrate;

forming a first electrode against the dielectric, wherein forming the dielectric includes forming a dielectric mesa, and wherein forming the first electrode against the dielectric includes forming a pair of first electrodes on opposing sidewalls of the dielectric mesa;

forming a variable resistance material coupled to the first electrode, wherein a first minor-axis surface of the first electrode forms an interface with the variable resistance material; and

forming a second electrode coupled to the variable resistance material.

7. The method of claim 6 , wherein forming the variable resistance material includes forming a variable resistance material in contact with another sidewall of the dielectric mesa normal to the opposing sidewalls.

8. A method of forming a memory device, comprising:

forming a dielectric on a semiconductive substrate;

forming a first electrode against the dielectric, wherein forming the dielectric includes forming a dielectric mesa, and wherein forming the dielectric mesa includes etching to leave a first electrode material on two ends of the dielectric mesa;

forming a variable resistance material coupled to the first electrode, wherein a first minor-axis surface of the first electrode forms an interface with the variable resistance material; and

forming a second electrode coupled to the variable resistance material.

9. A method of forming a memory device, comprising:

forming a dielectric on a semiconductive substrate;

forming a variable resistance material against the dielectric;

forming a first electrode coupled to the variable resistance material, wherein a first minor-axis surface of the variable resistance material forms an interface with the first electrode; and

forming a second electrode coupled to the variable resistance material.

10. The method of claim 9 , wherein forming the dielectric includes forming a dielectric mesa.

11. The method of claim 10 , wherein forming the variable resistance material against the dielectric includes forming a pair of variable resistance material portions on opposing sidewalls of the dielectric mesa.

12. The method of claim 11 , wherein forming the second electrode includes forming a second electrode in contact with another sidewall of the dielectric mesa normal to the opposing sidewalls.

13. The method of claim 10 , wherein forming the dielectric mesa includes etching to leave a variable resistance material portion on two ends of the dielectric mesa.

14. The method of claim 9 , wherein forming the variable resistance material includes forming a variable resistance material containing gallium.

15. The method of claim 9 , wherein forming the variable resistance material includes forming a variable resistance material containing germanium.

16. The method of claim 9 , wherein forming the variable resistance material includes forming a variable resistance material containing indium.

17. The method of claim 9 , wherein forming the variable resistance material includes forming a variable resistance material containing tellurium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →