P-FET WITH GRADED SILICON-GERMANIUM CHANNEL
A method of forming a semiconductor structure includes forming a silicon-germanium layer on a semiconductor region of a substrate having a specific concentration of germanium atoms. The semiconductor region and the silicon-germanium layer are annealed to induce a non-homogenous thermal diffusion of germanium atoms from the silicon-germanium layer into the semiconductor region to form a graded silicon-germanium region. Another method of forming a semiconductor structure includes etching a semiconductor region of the substrate to form a thinned semiconductor region. A silicon-germanium layer is formed on the thinned semiconductor region having a graded germanium concentration profile.
1 . A method of forming a semiconductor structure, the method comprising:
forming a silicon-germanium layer on a semiconductor region of a substrate, the silicon-germanium layer including a specific concentration of germanium atoms; and
annealing the semiconductor region of the substrate and the silicon-germanium layer to induce a non-homogenous thermal diffusion of germanium atoms from the silicon-germanium layer into the semiconductor region to form a graded silicon-germanium region. region; and
wherein the silicon-germanium region comprises a plurality of silicon-germanium sub-layers each having a varying concentration of germanium atoms, the concentration of germanium atoms in each silicon germanium sub-layer increases towards an interface between the graded silicon germanium region and the semiconductor region causing holes to be closer to a subsequently formed gate structure such that short channel effect is controlled.
2 . The method of claim 1 , wherein the specific concentration of germanium atoms ranges from approximately 30% to approximately 80% of germanium.
3 . The method of claim 1 , wherein the semiconductor region comprises a silicon fin.
4 . The method of claim 3 , wherein forming the silicon-germanium layer comprises epitaxially growing the silicon germanium layer on opposite sidewalls of the silicon fin.
5 . The method of claim 3 , wherein annealing the semiconductor region and the silicon-germanium layer comprises diffusing germanium atoms from the silicon-germanium layer into the silicon fin to form a graded silicon-germanium fin.
6 . The method of claim 5 , wherein forming the graded silicon-germanium fin comprises having a concentration of germanium atoms gradually increasing towards sidewalls of the graded silicon-germanium fin.
7 . The method of claim 6 , wherein the concentration of germanium atoms gradually increasing towards sidewalls of the graded silicon-germanium fin comprises having an atomic concentration of approximately 25% to 45% of germanium.
8 . The method of claim 6 , further comprising:
removing the silicon-germanium layer from the graded silicon-germanium fin so that the graded silicon-germanium fin has substantially similar dimensions as the silicon fin.
9 - 20 . (canceled)