IP Library Patent Application 14225647
Patent Application
App. No. 14/225,647

FLIP-CHIP WAFER LEVEL PACKAGE AND METHODS THEREOF

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Quick Facts
Patent No.
US None
App. No.
14/225,647
Abstract

An electronic package includes a flip-chip component having a first die coupled to a flip-chip substrate, second die stacked on the first die, an encapsulation compound formed around the first die and the second die, a set of through encapsulant vias (TEVs) providing a set of electrical connections from a first side of the electronic package to a second side of the electronic package through the encapsulation compound to the flip-chip substrate, and a redistribution layer electrically connecting a set of contacts on the second die to the set of TEVs on the first side of the electronic package.

Claims (23)

1 . A method for manufacturing an electronic package, the method comprising:

providing a flip-chip component having a first die coupled to a flip-chip substrate;

adhering the first die to a second die;

forming an encapsulation compound around the first die and the second die;

drilling a set of through encapsulant vias (TEVs) from a first side of the electronic package to the flip-chip substrate located on a second side of the electronic package;

filling the set of TEVs with an electrically conductive material; and

applying a redistribution layer electrically connecting a set of contacts on the second die to the set of TEVs on the first side of the electronic package.

2 . The method of claim 1 further comprising applying a protection layer covering the redistribution layer and the TEVs.

3 . The method of claim 1 further comprising adhering solder balls to the flip-chip substrate.

4 . The method of claim 1 further comprising separately testing and burning-in the flip-chip component.

5 . The method of claim 1 further comprising:

adhering the second die to a mold carrier with a releasable adhesive; and

removing the mold carrier from the second die.

6 . The method of claim 1 further comprising:

adhering the flip-chip component to a mold carrier with a releasable adhesive; and

removing the mold carrier from the flip-chip component.

7 . The method of claim 6 further comprising coupling a set of posts onto the set of contacts on the second die.

8 . The method of claim 5 wherein the posts comprise copper.

9 . The method of claim 6 further comprising:

forming the encapsulation compound over the second die; and

exposing the posts.

10 . The method of claim 9 wherein exposing the posts comprises grinding the encapsulation compound until the posts are exposed, the encapsulation compound forming a substantially planer surface.

11 . The method of claim 9 wherein exposing the posts comprises laser drilling the encapsulation compound.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061827/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →