IP Library Granted Patent US 9,225,501
Granted Patent B2
US 9,225,501 · App. 14/230,622 · Granted Dec 29, 2015

Non-linear modeling of a physical system using look-up table with polynomial interpolation

Inventor: Kameran Azadet (Pasadena, CA)
Assignee: Intel Corporation
H04L5/1461G06F17/15G06F17/50G06F17/5009H04B1/0475H04B1/525H04B1/62H04J11/004H04L1/0043H04L25/03012H04L25/03343H04L25/08H04L27/367H04L27/368H04B2001/0425
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Quick Facts
Patent No.
US 9,225,501
App. No.
14/230,622
Granted
Dec 29, 2015
Kind
B2
Abstract

Methods and apparatus are provided for non-linear modeling of a physical system using look-up tables with polynomial interpolation. A non-linear function is evaluated for a complex input value by obtaining at least one look-up table with polynomial interpolation that represents the non-linear function, wherein entries in the look-up table comprise polynomial coefficients of at least degree two for different segments of the non-linear function; obtaining a point from the look-up table that is near a magnitude of the complex input value; and generating a complex output value by evaluating the polynomial coefficients at the point to perform a Taylor Series expansion from said point. The non-linear function characterizes, for example, a power amplifier or an inverse of a power amplifier and the look-up tables can be used, for example, to implement digital pre-distortion.

Claims (42)

1. A digital pre-distortion (DPD) system, comprising:

a digital signal processor configured to evaluate a non-linear function for a complex input value, comprising:

a memory configured to store at least one look-up table with polynomial interpolation that represents said non-linear function, wherein entries in said look-up table comprise polynomial coefficients of at least degree two for different segments of said non-linear function, said polynomial coefficients configured to provide at least one of a rectangular or triangular basis function for each segment of said non-linear function;

at least one processor, coupled to the memory, operative to:

obtain a point from said look-tip table that is near a magnitude of said complex input value; and

generate a complex output value by evaluating said polynomial coefficients at said point to perform a Taylor Series expansion from said point.

2. A digital pre-distortion (DPD) system, comprising:

a digital signal processor configured to evaluate a non-linear function for a complex input value, comprising:

a memory configured to store at least one look-up table with polynomial interpolation that represents said non-linear function, wherein entries in said look-up table comprise polynomial coefficients of at least degree two for different segments of said non-linear function;

at least one processor, coupled to the memory, operative to:

obtain a point from said look-tip table that is near a magnitude of said complex input value; and

generate a complex output value by evaluating said polynomial coefficients at said point to perform a Taylor Series expansion from said point,

wherein values in said look-up table are configured to be obtained using a direct optimization technique that obtains physical data for said non-linear function by applying a set of complex input samples x(n) to said non-linear function and measuring a complex output y(n) of said non-linear function and directly computes parameters φ of a memory model for said non-linear function from said physical data, said memory model comprises one or more look-up tables having polynomial interpolation, and said parameters φ produce a substantially minimum mean square error, said parameters φ are provided for storage as entries in said one or more look-up tables.

3. The method of claim 1 , wherein said step of obtaining a point from said look-up table that is near said magnitude of said complex input value comprises obtaining two points that are near said magnitude of said complex input value and wherein said method further comprises the steps of evaluating said polynomial coefficients for said two points to perform a Taylor Series expansion from each point to form two intermediate values and linearly interpolating between said two intermediate values to generate said complex output value.

4. The method of claim 1 , wherein said non-linear function characterizes one or more of a power amplifier and an inverse of a power amplifier.

5. The method of claim 1 , wherein said one or more look-up tables are used to implement digital pre-distortion.

6. The method of claim 1 , wherein said one or more look-up tables with polynomial interpolation are used in a processor instruction as part of an instruction set of one or more of a scalar processor and a vector processor.

7. The method of claim 6 , wherein said look-up table is stored in a memory of said one or more of a scalar processor and a vector processor, and the polynomial interpolation is performed as part of a user-defined non-linear instruction that takes a complex number as an input, x, and computes ƒ(x).

8. The method of claim 7 , wherein said vector processor applies a complex input vector [x 1 , x 2 , . . . , x N ] to a plurality of non-linear functions f 1 , f 2 , . . . f N to compute a complex vector output, f 1 (x 1 ), f 2 (x 2 ) . . . f N (x N ).

9. The method of claim 1 , wherein values in said look-up tables are obtained using one or more of a least squares algorithm, recursive least squares (RLS) and least mean square (LMS).

10. The method of claim 1 , wherein said point that is near said magnitude of said complex input value comprises said point that is closest to said magnitude of said complex input value.

11. A power amplifier, comprising:

a digital signal processor that evaluates a non-linear function for a complex input value, comprising:

a memory configured to store storing at least one look-up table with polynomial interpolation that represents said non-linear function, wherein entries in said look-up table comprise polynomial coefficients of at least degree two for different segments of said non-linear function, said polynomial coefficients configured to provide at least one of a rectangular or triangular basis function for each segment of said non-linear function; and

at least one processor, coupled to the memory, operative to:

obtain a point from said look-tip table that is near a magnitude of said complex input value; and

generate a complex output value by evaluating said polynomial coefficients at said point to perform a Taylor Series expansion from said point.

12. A power amplifier, comprising:

a digital signal processor that evaluates a non-linear function for a complex input value, comprising:

a memory configured to store at least one look-up table-with polynomial interpolation that represents said non-linear function, wherein entries in said look-up table comprise polynomial coefficients of at least degree two for different segments of said non-linear function; and

at least one processor, coupled to the memory, operative to:

obtain a point from said look-tip table that is near a magnitude of said complex input value; and

generate a complex output-value by evaluating said polynomial coefficients at said point to perform a Taylor Series expansion from said point,

wherein values in said look-up table are configured to be obtained using a direct optimization technique that obtains physical data for said non-linear function by applying a set of complex input samples x(n) to said non-linear function and measuring a complex output y(n) of said non-linear function and directly computes parameters φ of a memory model for said non-linear function from said physical data, said memory model comprises one or more look-up tables having polynomial interpolation, and said parameters φ produce a substantially minimum mean square error, said parameters φ are provided for storage as entries in said one or more look-up tables.

13. The digital signal processor of claim 11 , wherein said step of obtaining a point from said look-up table that is near said magnitude of said complex input value comprises obtaining two points that are near said magnitude of said complex input value and wherein said digital signal processor further comprises the steps of evaluating said polynomial coefficients for said two points to perform a Taylor Series expansion from each point to form two intermediate values and linearly interpolating between said two intermediate values to generate said complex output value.

14. The digital signal processor of claim 11 , wherein said non-linear function characterizes one or more of a power amplifier and an inverse of a power amplifier.

15. The digital signal processor of claim 11 , wherein said one or more look-up tables are used to implement digital pre-distortion.

16. The digital signal processor of claim 11 , wherein said one or more look-up tables with polynomial interpolation are used in a processor instruction as part of an instruction set of one or more of a scalar processor and a vector processor.

17. The digital signal processor of claim 11 , wherein said digital signal processor is one or more of a scalar processor and a vector processor, and wherein the polynomial interpolation is performed as part of a user-defined non-linear instruction that takes a complex number as an input, x, and computes ƒ(x).

18. The digital signal processor of claim 17 , wherein said vector processor applies a complex input vector [x 1 , x 2 , . . . , x N ] to a plurality of non-linear functions f 1 , f 2 , . . . f N to compute a complex vector output, f 1 (x 1 ), f 2 (x 2 ) . . . f N (x N ).

19. The digital signal processor of claim 11 , wherein values in said look-up tables are obtained using one or more of a least squares algorithm, recursive least squares (RLS) and least mean square (LMS).

20. The digital signal processor of claim 11 , wherein said point that is near said magnitude of said complex input value comprises said point that is closest to said magnitude of said complex input value.

Assignments (6)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN CERTAIN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (032856/0031) Recorded Aug 13, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 036343/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE, LTD.
To: INTEL CORPORATION
Reel/Frame 036098/0375 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2014
From: AZADET, KAMERAN
To: LSI CORPORATION
Reel/Frame 032563/0414 →
Continuity (2)
Provisional Application 61812858 · Apr 17, 2013
Related Publication 20140314181A1 · Oct 23, 2014