Semiconductor device and fabrication method for same
A semiconductor device includes an electrical insulating layer with superior heat resistance, heat dissipation, and durability, and which is manufactured through a process with good cost performance and process performance. In a semiconductor device including a first substrate to which a semiconductor chip is mounted directly or indirectly, and a white insulating layer formed on a surface of the first substrate and functioning as a reflecting material, the semiconductor chip is an LED, at least the surface of the first substrate is made of a metal, and a stacked structure of the white insulating layer and a metal layer is formed by coating a liquid material, which contains SiO 2 in the form of nanoparticles and a white inorganic pigment, over the surface of the first substrate and baking the coated liquid material.
1. A semiconductor device comprising:
a first substrate to which a semiconductor chip is directly or indirectly mounted,
a white insulating layer formed on a reflecting region of the first substrate and functioning as a reflecting material, and
a wiring pattern connected to electrodes is formed on the white insulating layer,
wherein a surface of the reflecting region is substantially flat and made of a metal, and the white insulating layer is formed on the surface of the reflecting region wherein the semiconductor chip is an LED chip disposed in the reflecting region,
wherein the wiring pattern is formed on the surface of the white insulating layer,
wherein the white insulating layer includes white inorganic pigments and SiO 2 particles having a mean particle diameter of several nm to several hundred nm,
wherein a rate of SiO 2 particles and the white inorganic pigment contained in the white insulating layer is 80% by weight or greater,
wherein a rate of the white inorganic pigments contained in the white insulating layer is 40% by weight or greater,
wherein a rate of the SiO 2 particles contained in the white insulating layer is 25% by weight or greater, and
wherein a bottom surface or a side surface of the LED chip is adjacent to the white insulating layer.
2. The semiconductor device according to claim 1 , wherein a mean particle diameter of the white inorganic pigments is 1 μm or smaller.
3. The semiconductor device according to claim 1 , wherein the first substrate is a module substrate to which an LED package including an LED chip is mounted.
4. The semiconductor device according to claim 1 , wherein a rate of the SiO 2 particles contained in the white insulating layer is 30 to 40% by weight.
5. The semiconductor device according to claim 1 , wherein the white inorganic pigments are one of titanium dioxide, magnesium oxide, alumina, and zinc oxide, or a combination of the aforesaid oxides.
6. The semiconductor device according to claim 1 , wherein the white insulating layer is a laminated layer made up of a first layer containing first white inorganic pigments and a second layer containing second white inorganic pigments that are different from the first white inorganic pigments.
7. The semiconductor device according to claim 1 , wherein a thickness of the white insulating layer is 10 to 150 μm.
8. The semiconductor device according to claim 1 , wherein the wiring is formed by coating ink containing silver particles and copper particles with drawing.
9. The semiconductor device according to claim 1 , wherein the first substrate is a module substrate to which a plurality of LED chips are mounted.
10. The semiconductor device according to claim 1 , wherein a rate of the white inorganic pigment contained in the white insulating layer is 40 to 70% by weight.
11. The semiconductor device according to claim 6 , wherein the first white inorganic pigments are one of titanium dioxide, magnesium oxide, alumina, and zinc oxide, or a combination of the aforesaid oxides, and the second white inorganic pigments are one of titanium dioxide, magnesium oxide, alumina, and zinc oxide, or a combination of said oxides.
12. The semiconductor device according to claim 1 , wherein a placement portion in which the metal surface is exposed is formed at a position where the semiconductor chip is arranged.
13. The semiconductor device according to claim 1 , wherein the placement portion is a projected placement portion.
14. The semiconductor device according to claim 1 , wherein a thickness of the white insulating layer is 15 to 100 μm.