Direct metalization of electrical circuit structures

1. A method of making an electrical interconnect comprising the steps of:

providing a first circuitry layer comprising a first surface and a second surface;

printing at least a first dielectric layer on the first surface of the first circuitry layer to include a plurality of first recesses;

depositing a conductive material on surfaces of a plurality of the first recesses comprising a plurality of first conductive structures electrically coupled to, and extending perpendicular to, the first circuitry layer;

printing a filler material in the first conductive structures;

printing at least a second dielectric layer on the first dielectric layer to include a plurality of second recesses at least partially aligned with a plurality of the first conductive structures;

depositing a conductive material on surfaces of a plurality of the second recesses comprising a plurality of second conductive structures electrically coupled to, and extending parallel to the first conductive structures; and

printing a dielectric material in one or more of the first and second recesses to surround one or more of the first and second conductive structures.

2. The method of claim 1 comprising electrically coupling contact pads on an IC device to a plurality of the second conductive structures.

3. The method of claim 1 comprising the steps of:

locating a second circuitry layer on the second dielectric layer to electrically couple the second circuitry layer with a plurality of the second conductive structures; and

printing at least a third dielectric layer on the second dielectric layer to include a plurality of third recesses at least partially aligned with a plurality of the second conductive structures.

4. The method of claim 3 comprising etching away portions of the second circuitry layer located in the third recesses to expose a plurality of the second conductive structures.

5. The method of claim 3 comprising the steps of:

plating a conductive material on surfaces of a plurality of the third recesses comprising a plurality of third conductive structures electrically coupled to, and extending parallel to the second conductive structures; and

electrically coupling contact pads on an IC device to a plurality of the third conductive structures, wherein the step of electrically coupling comprises one of a flip chip attachment directly to a plurality of third conductive structures, solder balls, or wire bonding.

6. The method of claim 3 comprising the steps of:

locating a third circuitry layer on the third dielectric layer; and

attaching a covering layer to the third circuitry layer, the covering layer comprising a plurality of openings exposing contact pads on the third circuitry layer configured to electrically couple with an IC device.

7. The method of claim 1 comprising attaching a covering layer to the second surface of the first circuitry layer, the covering layer comprising a plurality of openings exposing a plurality of contact pads on the first circuitry layer adapted to electrically couple with a PCB.

8. The method of claim 1 wherein at least one of the first and second conductive structures comprise a coaxial conductive structure.

9. The method of claim 1 comprising printing at least one electrical device on one of the dielectric layers and electrically coupling the electrical device to at least a portion of the circuitry layer.