IP Library Granted Patent US 9,468,993
Granted Patent B2
US 9,468,993 · App. 14/239,014 · Granted Oct 18, 2016

Method for producing semiconductor device

Inventors: Toshiyuki Miyasaka (Matsumoto, JP); Yuta Tamai (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
B23K26/20H01L21/50H01L23/047H01L23/49568H01L25/18H01L23/24H01L23/3735H01L23/49811H01L24/29H01L24/32H01L24/33H01L24/40H01L24/73H01L24/83H01L24/84H01L25/072H01L2224/291H01L2224/32225H01L2224/33181H01L2224/40095H01L2224/40101H01L2224/40137H01L2224/73263H01L2224/83815H01L2224/84214H01L2924/014H01L2924/1203H01L2924/12042H01L2924/13055H01L2924/15788
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Quick Facts
Patent No.
US 9,468,993
App. No.
14/239,014
Granted
Oct 18, 2016
Kind
B2
Abstract

A method for producing a semiconductor device includes laser welding to bond an upper terminal and a lower terminal as internal wiring members of the semiconductor device. When the upper terminal is fixed to the lower terminal by the laser welding, a gap between an upper surface of the lower terminal and a lower surface of the upper terminal is equal to or more than 20 μm and equal to or less than 400 μm.

Claims (7)

1. A method for producing a semiconductor device, comprising:

forming a step portion on a rear surface of an upper terminal,

close contacting the rear surface of the upper terminal where the step portion is not formed, to an upper surface of a lower terminal to thereby set a gap at the step portion between the upper surface of the lower terminal and the rear surface of the upper terminal to equal to or more than 20 μm and equal to or less than 400 μm, said gap being laterally open between the lower terminal and the upper terminal without being closed, said lower and upper terminals being internal wiring members of the semiconductor device, and

radiating a laser beam to a surface of the upper terminal immediately above the step portion to laser-weld the upper terminal directly to the lower terminal while keeping the gap between the upper terminal and the lower terminal.

2. The method for producing the semiconductor device according to claim 1 , wherein forming the step portion on the rear surface of the upper terminal comprises thinning one end portion of the upper terminal.

3. The method for producing the semiconductor device according to claim 2 , wherein in thinning the one end portion of the upper terminal, the step portion is formed to have an open end and a closed end having an inclined surface after close contacting the rear surface of the upper terminal where the step portion is not formed to the upper surface of the lower terminal.

4. The method for producing the semiconductor device according to claim 3 , wherein thinning the one end portion of the upper terminal includes cutting or crushing the one end portion of the upper terminal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2014
From: MIYASAKA, TOSHIYUKI; TAMAI, YUTA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 032323/0664 →
Priority Claims (1)
JP 2011-201962 · Sep 15, 2011 · national
Continuity (1)
Related Publication 20140203420A1 · Jul 24, 2014