IP Library › Granted Patent US 9,293,566
Granted Patent B2
US 9,293,566 · App. 14/247,665 · Granted Mar 22, 2016

Method for manufacturing semiconductor device

Inventors: Toshinari Sasaki (Atsugi, JP); Junichiro Sakata (Atsugi, JP); Hiroki Ohara (Sagamihara, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/66742H01L29/66969H01L29/7869H01L29/78606H01L29/78618H01L27/1225
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Quick Facts
Patent No.
US 9,293,566
App. No.
14/247,665
Granted
Mar 22, 2016
Kind
B2
Abstract

It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

Claims (72)

1. A semiconductor device comprising:

a first oxide semiconductor layer;

a pair of second oxide semiconductor layers over the first oxide semiconductor layer;

a source electrode over one of the pair of second oxide semiconductor layers;

a drain electrode over the other of the pair of second oxide semiconductor layers;

an oxide insulating layer over and in contact with a region of the first oxide semiconductor layer; and

an electrode over the oxide insulating layer, the electrode overlapping with the region of the first oxide semiconductor layer,

wherein the region of the first oxide semiconductor layer comprises an intrinsic oxide semiconductor, and

wherein the pair of second oxide semiconductor layers comprises an n-type semiconductor.

2. The semiconductor device according to claim 1 ,

wherein each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers contains indium and zinc.

3. The semiconductor device according to claim 1 ,

wherein the source electrode and the drain electrode are in contact with the first oxide semiconductor layer.

4. The semiconductor device according to claim 1 ,

wherein a peak of a desorption constituent, which is derived from moisture, is not shown in a spectrum of each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers, which is shown with thermal desorption spectroscopy in a temperature range of greater than or equal, to 200° C.

5. The semiconductor device according to claim 1 ,

wherein the pair of second oxide semiconductor layers has higher crystallinity than the first oxide semiconductor layer.

6. The semiconductor device according to claim 1 ,

wherein the pair of second oxide semiconductor layers includes nanocrystals.

7. The semiconductor device according to claim 1 ,

wherein carrier density of the region of the first oxide semiconductor layer is lower than or equal to 1×10 −14 /cm 3 .

8. The semiconductor device according to claim 1 ,

wherein the oxide insulating layer is a layer which blocks moisture, hydrogen ion and OH − .

9. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

a first oxide semiconductor layer over the gate insulating layer;

a pair of second oxide semiconductor layers over the first oxide semiconductor layer;

a source electrode over one of the pair of second oxide semiconductor layers;

a drain electrode over the other of the pair of second oxide semiconductor layers; and

an oxide insulating layer over and in contact with a region of the first oxide semiconductor layer,

wherein the region of the first oxide semiconductor layer comprises an intrinsic oxide semiconductor, and

wherein the pair of second oxide semiconductor layers comprises an n-type semiconductor.

10. The semiconductor device according to claim 9 ,

wherein each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers contains indium and zinc.

11. The semiconductor device according to claim 9 ,

wherein the source electrode and the drain electrode are in contact with the first oxide semiconductor layer.

12. The semiconductor device according to claim 9 ,

wherein a peak of a desorption constituent, which is derived from moisture, is not shown in a spectrum of each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers, which is shown with thermal desorption spectroscopy in a temperature range of greater than or equal to 200° C.

13. The semiconductor device according to claim 9 ,

wherein the pair of second oxide semiconductor layers has higher crystallinity than the first oxide semiconductor layer.

14. The semiconductor device according to claim 9 ,

wherein the pair of second oxide semiconductor layers includes nanocrystals.

15. The semiconductor device according to claim 9 ,

wherein carrier density of the region of the first oxide semiconductor layer is lower than or equal to 1×10 −14 /cm 3 .

16. The semiconductor device according to claim 9 ,

wherein the oxide insulating layer is a layer which blocks moisture, hydrogen ion and OH − .

17. A semiconductor device comprising:

a first gate electrode;

a gate insulating layer over the first gate electrode;

a first oxide semiconductor layer over the gate insulating layer;

a pair of second oxide semiconductor layers over the first oxide semiconductor layer;

a source electrode over one of the pair of second oxide semiconductor layers;

a drain electrode over the other of the pair of second oxide semiconductor layers;

an oxide insulating layer over and in contact with a region of the first oxide semiconductor layer;

a second gate electrode overlapping with the first gate electrode with the region of the first oxide semiconductor layer interposed therebetween,

wherein the region of the first oxide semiconductor layer comprises an intrinsic oxide semiconductor, and

wherein the pair of second oxide semiconductor layers comprises an n-type semiconductor.

18. The semiconductor device according to claim 17 ,

wherein each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers contains indium and zinc.

19. The semiconductor device according to claim 17 ,

wherein the source electrode and the drain electrode are in contact with the first oxide semiconductor layer.

20. The semiconductor device according to claim 17 ,

wherein a peak of a desorption constituent, which is derived from moisture, is not shown in a spectrum of each of the first oxide semiconductor layer and the pair of second oxide semiconductor layers, which is shown with thermal desorption spectroscopy in a temperature range of greater than or equal to 200° C.

21. The semiconductor device according to claim 17 ,

wherein the pair of second oxide semiconductor layers has higher crystallinity than the first oxide semiconductor layer.

22. The semiconductor device according to claim 17 ,

wherein the pair of second oxide semiconductor layers includes nanocrystals.

23. The semiconductor device according to claim 17 ,

wherein carrier density of the region of the first oxide semiconductor layer is lower than or equal to 1×10 −14 /cm 3 .

24. The semiconductor device according to claim 17 ,

wherein the oxide insulating layer is a layer which blocks moisture, hydrogen ion and OH − .

Priority Claims (1)
JP 2009-156414 · Jun 30, 2009 · national
Continuity (5)
Continuation 13967605 · Aug 15, 2013
Continuation 13767335 · Feb 14, 2013
Continuation 13495481 · Jun 13, 2012
Continuation 12826015 · Jun 29, 2010
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