Scheduling of global voltage/frequency scaling switches among asynchronous dataflow dependent processors
Task execution among a plurality of processors that are configured to operate concurrently at a same global Voltage/Frequency (VF) level is controlled by using a global power manager to control VF switching from one VF level to another VF level, the same current VF level governing VF settings of each processor. Each of the processors controls whether it will wait for a VF switch from a current VF level to a next VF level prior to enabling execution of a next scheduled task for the one of the processors, with the decision being based on whether a current VF level is higher than the next scheduled VF level. The global power manager performs VF level switching at least based on a timing schedule, and in some but not all embodiments, also on whether all processors indicate that they are waiting for a VF level switch.
1. A method of controlling task execution among a plurality of processors that are configured to operate concurrently at a same global Voltage/Frequency (VF) level, the method comprising:
using a global power manager to control VF switching from one VF level to another VF level, wherein a same current VF level governs VF settings of each of the processors; and
each one of the processors controlling whether the one of the processors will wait for a VF switch from a current VF level to a next VF level prior to enabling execution of a next scheduled task for the one of the processors,
wherein:
the global power manager performs a VF level switching process that comprises:
controlling a timer so as to cause the timer to generate a timer event at a known future time; and
whenever the timer event occurs, detecting the timer event and in response to said detection, causing a VF switch from a current VF level to a next scheduled VF level; and
controlling whether said one of the processors will wait for a VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled task for the one of the processors comprises:
detecting that the current VF level is higher than the next scheduled VF level; and
responsive to said detecting that the current VF level is higher than the next scheduled VF level, causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin, otherwise enabling execution of the next scheduled tasks of the one of the processors to begin without waiting for the VF switch from the current VF level to the next VF level.
2. The method of claim 1 , wherein causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin comprises:
causing the one of the processors to wait until the one of the processors detects an occurrence of the timer event.
3. The method of claim 1 , wherein the VF level switching process performed by the global power manager comprises:
detecting that all execution processes of the processors are waiting for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin, and in response to said detection, causing the VF switch from the current VF level to the next scheduled VF level.
4. The method of claim 3 , wherein causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin comprises:
notifying the global power manager that the one of the processors is waiting for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin.
5. The method of claim 1 , wherein each one of the next scheduled tasks of the one of the processors begins only when execution of said one of the next scheduled tasks has been enabled and when all task specific dependencies of said one of the next scheduled tasks has been satisfied.
6. The method of claim 5 , where the task specific dependencies of said one of the next scheduled tasks comprises task specific data dependencies.
7. An apparatus that controls task execution among a plurality of processors that are configured to operate concurrently at a same global Voltage/Frequency (VF) level, the apparatus comprising:
a global power manager configured to control VF switching from one VF level to another VF level, wherein a same current VF level governs VF settings of each of the processors; and
a task execution controller in each one of the processors, each task one of the task execution controllers being configured to control whether the one of the processors will wait for a VF switch from a current VF level to a next VF level prior to enabling execution of a next scheduled task for the one of the processors,
wherein:
the global power manager is configured to perform a VF level switching process that comprises:
controlling a timer so as to cause the timer to generate a timer event at a known future time; and
whenever the timer event occurs, detecting the timer event and in response to said detection, causing a VF switch from a current VF level to a next scheduled VF level; and
each of the task execution controllers is configured to control whether said one of the processors will wait for a VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled task for the one of the processors by:
detecting that the current VF level is higher than the next scheduled VF level; and
responsive to said detecting that the current VF level is higher than the next scheduled VF level, causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin, otherwise enabling execution of the next scheduled tasks of the one of the processors to begin without waiting for the VF switch from the current VF level to the next VF level.
8. The apparatus of claim 7 , wherein causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin comprises:
causing the one of the processors to wait until the one of the processors detects an occurrence of the timer event.
9. The apparatus of claim 7 , wherein the VF level switching process performed by the global power manager comprises:
detecting that all execution processes of the processors are waiting for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin, and in response to said detection, causing the VF switch from the current VF level to the next scheduled VF level.
10. The apparatus of claim 9 , wherein causing the one of the processors to wait for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin comprises:
notifying the global power manager that the one of the processors is waiting for the VF switch from the current VF level to the next VF level prior to enabling execution of the next scheduled tasks of the one of the processors to begin.
11. The apparatus of claim 7 , wherein each one of the next scheduled tasks of the one of the processors begins only when execution of said one of the next scheduled tasks has been enabled and when all task specific dependencies of said one of the next scheduled tasks has been satisfied.
12. The apparatus of claim 11 , where the task specific dependencies of said one of the next scheduled tasks comprises task specific data dependencies.