IP Library Granted Patent US 9,343,233
Granted Patent B2
US 9,343,233 · App. 14/250,878 · Granted May 17, 2016

Additively deposited electronic components and methods for producing the same

Inventors: Manos Tentzeris (Atlanta, GA); Benjamin Cook (Atlanta, GA)
Assignee: GEORGIA TECH RESEARCH CORPORATION
H01G4/18H01G4/008H01G4/33H01L28/10H01L28/40
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,343,233
App. No.
14/250,878
Granted
May 17, 2016
Kind
B2
Abstract

An exemplary embodiment of the present invention provides a passive electrical component comprising a substrate, a first electrically conductive layer, a first dielectric layer, and a second electrically conductive layer. The first electrically conductive layer can be additively deposited on the substrate. The first dielectric layer can be additively deposited on the first conducive layer. The first dielectric layer can comprise a cross-linked polymer. The second electrically conductive layer can be additively deposited on the first dielectric layer. The resonant frequency of the passive electrical component can exceed 1 gigahertz.

Claims (74)

1. A passive electrical component comprising:

a substrate;

a first electrically conductive layer additively deposited on the substrate;

a first dielectric layer having a total thickness below 6 micrometers additively deposited on the first conductive layer, wherein the first dielectric layer comprises, at least a cured mixture of poly(4-vinylphenol) (PVP) resin and poly melamine-co-formaldehyde cross-linking agent; and

a second electrically conductive layer additively deposited on the first dielectric layer;

wherein a resonant frequency of the passive electrical component exceeds 1 gigahertz.

2. The passive electrical component of claim 1 , wherein the passive electrical component has a capacitance below 60 picofarads.

3. The passive electrical component of claim 1 , wherein the passive electrical component has a quality factor (Q-factor) above 2 at a signal frequency of 1 gigahertz.

4. The passive electrical component of claim 1 , wherein the cured mixture of PVP and PMF has a molecular weight greater than 500.

5. The passive electrical component of claim 1 , wherein the substrate is flexible.

6. The passive electrical component of claim 1 , wherein the substrate comprises silicon.

7. The passive electrical component of claim 1 ,

wherein the first dielectric layer comprises a total thickness below 1 micrometer.

8. A passive electrical component comprising:

a substrate;

a first electrically conductive layer additively deposited on the substrate;

a first dielectric layer additively deposited on the first conductive layer, wherein the first dielectric layer comprises a cross-linked polymer; and

a second electrically conductive layer additively deposited on the first dielectric layer;

wherein a resonant frequency of the passive electrical component exceeds 1 gigahertz;

wherein the first and second electrically conductive layers comprise sintered silver nanoparticles;

wherein the conductivity of each electrically conductive layer exceeds 3 ×106 S/m; and

wherein the first and second electrically conductive layers each have a total thickness below 3 micrometers.

9. The passive electrical component of claim 8 , wherein the passive electrical component has a capacitance below 60 picofarads.

10. The passive electrical component of claim 8 , wherein the passive electrical component has a quality factor (Q-factor) above 2 at a signal frequency of 1 gigahertz.

11. The passive electrical component of claim 8 , wherein the cross-linked polymer has a molecular weight greater than 500.

12. The passive electrical component of claim 8 , wherein the substrate is flexible.

13. The passive electrical component of claim 8 , wherein the substrate comprises silicon.

14. The passive electrical component of claim 8 , wherein the first dielectric layer comprises a total thickness below 1 micrometer.

15. A passive electrical component comprising:

a substrate;

a first electrically conductive layer additively deposited on the substrate;

a first dielectric layer additively deposited on the first conductive layer, wherein the first dielectric layer comprises a cross-linked polymer;

a second electrically conductive layer additively deposited on the first dielectric layer; and

at least one surface-mount connector electrically connected to at least one of:

the first electrically conductive layer, and

the second electrically conductive layer;

wherein a resonant frequency of the passive electrical component exceeds 1 gigahertz.

16. The passive electrical component of claim 15 , wherein the passive electrical component has a capacitance below 60 picofarads.

17. The passive electrical component of claim 15 , wherein the passive electrical component has a quality factor (Q-factor) above 2 at a signal frequency of 1 gigahertz.

18. The passive electrical component of claim 15 , wherein the cross-linked polymer has a molecular weight greater than 500.

19. The passive electrical component of claim 15 , wherein the substrate is flexible.

20. The passive electrical component of claim 15 , wherein the substrate comprises silicon.

21. The passive electrical component of claim 15 , wherein the first dielectric layer comprises a total thickness below 1 micrometer.

22. A passive electrical component comprising:

a substrate;

a first electrically conductive layer additively deposited on the substrate, wherein the first electrically conductive layer comprises a first element comprising a spiral and a lead, and a second element, physically and electrically isolated from the first, comprising a lead;

a first dielectric layer, comprising a cross-linked polymer, additively deposited on the substrate and the first electrically conductive layer, the first dielectric layer further comprising two or more deposition-free regions forming vias to the first electrically conductive layer; and

a second electrically conductive layer additively deposited on the first dielectric layer, wherein the second electrically conductive layer connects the deposition-free regions of the first dielectric layer, forming a conductive path between the vias.

23. The passive electrical component of claim 22 , wherein the passive electrical component has a capacitance below 60 picofarads.

24. The passive electrical component of claim 22 , wherein the passive electrical component has a quality factor (Q-factor) above 2 at a signal frequency of 1 gigahertz.

25. The passive electrical component of claim 22 , wherein the cross-linked polymer has a molecular weight greater than 500.

26. The passive electrical component of claim 22 , wherein the substrate is flexible.

27. The passive electrical component of claim 22 , wherein the substrate comprises silicon.

28. The passive electrical component of claim 22 , wherein the first dielectric layer comprises a total thickness below 1 micrometer.

29. A method of fabricating a passive electrical component, comprising:

additively depositing a first electrically conductive layer on a flexible substrate, wherein the first electrically conductive layer comprises electrically conductive particles suspended in a liquid;

curing the first electrically conductive layer;

additively depositing a first dielectric layer on the first electrically conductive layer, wherein the first dielectric layer comprises an uncured polymer;

curing the first dielectric layer;

additively depositing a second electrically conductive layer on the first dielectric layer, wherein the second electrically conductive layer comprises electrically conductive particles suspended in a liquid; and

curing the second electrically conductive layer.

30. The method of claim 29 , wherein the first electrically conductive layer, the first dielectric layer, and the second electrically conductive layer are additively deposited using one or more inkjet printers.

31. The method of claim 29 , wherein curing the first dielectric layer comprises at least one of:

exposing the first dielectric layer to ultraviolet radiation; and

heating the first dielectric layer.

32. The method of claim 29 , wherein the first dielectric layer before curing comprises SU-8 polymer and cyclopentanone; and

wherein the first dielectric layer, after curing, comprises a total thickness below 7 micrometers.

33. The method of claim 29 , wherein the first dielectric layer before curing comprises poly(4-vinylphenol) (PVP) and 1-hexanol; and

wherein the first dielectric layer, after cross-linking, comprises a total thickness below 1 micrometer.

34. The method of claim 29 , wherein curing the first and second electrically conductive layers comprises:

evaporating the liquid in which the electrically conductive particles are suspended; and

laser sintering the electrically conductive particles.

35. The method of claim 34 , wherein the conductive particles comprise silver nanoparticles.

36. The method of claim 35 , wherein the first and second electrically conductive layers, after sintering, each comprises a total thickness below 3 micrometers.

Assignments (2)
CONFIRMATORY LICENSE Recorded Sep 19, 2016
From: GEORGIA INSTITUTE OF TECHNOLOGY
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 040069/0605 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: TENTZERIS, MANOS; COOK, BENJAMIN
To: GEORGIA TECH RESEARCH CORPORATION
Reel/Frame 033707/0806 →
Continuity (2)
Provisional Application 61810910 · Apr 11, 2013
Related Publication 20140307363A1 · Oct 16, 2014