Topography driven OPC and lithography flow
View Patent ↗Enhancements in lithography for forming an integrated circuit are disclosed. The enhancements include a topography analysis of a design data file to obtain accumulative topography information for different mask levels. The topography information facilitates topography driven optical proximity correction and topography driven lithography.
1. A method for forming a device comprising:
providing a design data file of an integrated circuit (IC);
performing topography analysis on the design data file by using a topography module, wherein the analysis comprises generating topography maps for mask levels of the IC based on accumulative topography profile for different mask levels separating a mask level into topography regions based on relative heights, wherein topography maps comprise topography regions;
performing optical proximity correction (OPC), by using an OPC module, on the design data file with topography information from the topography analysis, wherein the OPC adjusts patterns of the mask levels based on defocus values associated with topography regions, the OPC produces an adjusted design data file;
generating a mask set from the adjusted design data file; and
processing a wafer to form devices using the mask set.
2. The method of claim 1 wherein:
the topography regions of a respective mask level are based on a baseline topography region of the respective mask level;
the baseline topography region of the respective mask level is assigned a baseline height value of 0 and heights of other topography regions are based on relative heights based on the relative baseline height; and
the topography analysis further comprises binning regions based on relative height of the respective mask level.
3. The method of claim 2 wherein the relative height comprises a height range.
4. The method of claim 3 wherein the baseline region comprises a region with an intermediate height between the highest and lowest heights of the regions of the respective mask level.
5. The method of claim 3 wherein the baseline region comprises a region with the lowest height of the respective mask level.
6. The method of claim 1 wherein the defocus values of the topography regions are based on height range of bins.
7. The method of claim 6 wherein the defocus values are based on real line information.
8. The method of claim 1 comprising performing pre-OPC processing, wherein pre-OPC processing comprises performing process window OPC (PWOPC), wherein PWOPC is derived from topography information.
9. The method of claim 1 comprising performing pre-OPC processing, wherein pre-OPC processing comprises adjusting fill generation rules, wherein fill generation rules take into account topography information.
10. A method for forming a device comprising:
providing a design data file of an integrated circuit (IC);
performing topography analysis on the design data file by using a topography module, wherein the analysis comprises
generating accumulative topography profile for different mask levels,
separating a mask level into topography regions based on relative heights, and
generating topography maps for mask levels of the IC, and wherein the topography maps comprise topography regions;
performing optical proximity correction (OPC) by using an OPC module, on the design data file with topography information from the topography analysis, wherein the OPC adjusts patterns of the mask levels based on defocus values associated with topography regions, the OPC produces an adjusted design data file;
generating a mask set from the adjusted design data file; and
processing a wafer to form devices using the mask set.
11. The method of claim 10 wherein topography regions of a respective mask level are based on a baseline topography region of the respective mask level.
12. The method of claim 11 wherein the baseline topography region of the respective mask level is assigned a baseline height value of 0 and heights of other topography regions are based on relative heights based on the relative baseline height.
13. The method of claim 12 wherein the topography analysis further comprises binning regions based on relative height of the respective mask level.
14. The method of claim 12 wherein the baseline region comprises a region with the lowest height of the respective mask level.
15. The method of claim 12 wherein the baseline region comprises a region with an intermediate height between the highest and lowest heights of the regions of the respective mask level.
16. A method for making a mask set comprising:
providing a design data file of an integrated circuit (IC);
performing topography analysis on the design data file by using a topography module, wherein the analysis comprises generating topography maps for the mask levels of the IC based on accumulative topography profile for different mask levels, wherein the topography maps comprise topography regions;
performing optical proximity correction (OPC) by using an OPC module, on the design data file with topography information from the topography analysis, wherein the OPC adjusts patterns of the mask levels based on defocus values associated with topography regions, the OPC produces an adjusted design data file, wherein the defocus values of the topography regions are based on height range of bins; and
generating a mask set from the adjusted design data file.
17. A system for reticle enhancement of a design data file of an integrated circuit comprising:
a topography analysis module for performing topography analysis on the design data file, the topography analysis comprises generating topography maps of mask levels of the IC with topography regions;
a binning module for providing bin markers to the topography regions to the design data file to form a binned design data file; and
an optical proximity correction (OPC) module for performing OPC on the binned design data file, wherein the OPC adjusts patterns of the mask levels based on defocus values associated with topography regions, the OPC produces an adjusted design data file.
18. A method for forming a device comprising:
providing a design data file of an integrated circuit (IC);
performing topography analysis on the design data file by using a topography module, the analysis comprises
generating topography maps for mask levels of the IC, wherein topography maps comprise topography regions,
analyzing the design data file to generate accumulative topography profile for different mask levels, and
separating a mask level into topography regions based on relative heights, wherein the relative height comprises a height range; and
generating a mask set from the design data file.
19. The method of claim 18 comprising:
performing optical rule check (ORC) simulation on the design data file, wherein the ORC determines topography hot spots based on topography of the respective mask levels;
performing process window qualification (PWQ) to determine process parameters for the mask levels based on the topography hot spots, wherein the process parameters comprise best focus conditions and other lithographic process parameters; and
processing a wafer to form devices using the mask set and process parameters from PWQ.
20. The method of claim 19 wherein:
the topography regions of a respective mask level are based on a baseline topography region of the respective mask level;
the baseline topography region of the respective mask level is assigned a baseline height value of 0 and heights of other topography regions are based on relative heights based on the relative baseline height; and
the topography analysis further comprises binning regions based on relative height of the respective mask level.
21. The method of claim 20 wherein the baseline region comprises a region with an intermediate height between the highest and lowest heights of the regions of the respective mask level.
22. The method of claim 20 wherein the baseline region comprises a region with the lowest height of the respective mask level.