IP Library Granted Patent US 9,276,087
Granted Patent B2
US 9,276,087 · App. 14/262,937 · Granted Mar 1, 2016

Methods of manufacturing FINFET semiconductor devices using sacrificial gate patterns and selective oxidization of a fin

Inventors: Sungmin Kim (Incheon, KR); Sung-Dae Suk (Seoul, KR); Jaehoo Park (Hwasung-si, KR); Dongho Cha (Seongnam-si, KR); Daewon Ha (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L29/66795H01L21/02233H01L21/845H01L29/66545
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Quick Facts
Patent No.
US 9,276,087
App. No.
14/262,937
Granted
Mar 1, 2016
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the active fin on the substrate, forming an interlayer insulating layer on the sacrificial gate pattern, removing the sacrificial gate pattern to form a gap region exposing the active fin in the interlayer insulating layer, and oxidizing a portion of the active fin exposed by the gap region to form an insulation pattern between the active fin and the substrate.

Claims (34)

1. A method of manufacturing a semiconductor device, the method comprising:

patterning a substrate to form an active fin;

forming a sacrificial gate pattern crossing over the active fin on the substrate;

forming an interlayer insulating layer on the sacrificial gate pattern;

removing the sacrificial gate pattern to form a gap region exposing the active fin in the interlayer insulating layer; and

oxidizing a portion of the active fin exposed by the gap region to form an insulation pattern between the active fin and the substrate,

wherein the insulation pattern separates the active fin from the substrate,

wherein patterning the substrate to form the active fin comprises:

patterning the substrate to form a first portion of an active fin;

forming device isolation patterns having sidewalls aligned with sidewalls of the first portion of the active fin on or in the substrate; and

etching upper portions of the device isolation patterns to form a second portion of the active fin, the second portion having sidewalls exposed by the upper portions of the device isolation patterns, and

wherein oxidizing the portion of the active fin to form the insulation pattern between the active fin and the substrate comprises:

performing an oxidation process on the second portion of the active fin; and

oxidizing a portion of the substrate under the second portion of the active fin using the oxidation process.

2. The method of claim 1 , wherein the insulation pattern is connected to the device isolation patterns which are adjacent to each Other with the insulation pattern therebetween.

3. The method of claim 1 , wherein oxidizing the portion of the active fin to form the insulation pattern between the active fin and the substrate further comprises:

etching portions of the sidewalls of the second portion of the active fin before performing the oxidation process.

4. The method of claim 1 , wherein the active fin includes a first region under the sacrificial gate pattern and second regions at both sides of the sacrificial gate pattern, the method further comprising:

etching the second regions of the active fin to expose the substrate at the both sides of the sacrificial gate pattern; and

growing an epitaxial layer from the exposed substrate to form source/drain regions.

5. A method of manufacturing a semiconductor device, the method comprising:

patterning a substrate to form an active fin;

forming a sacrificial gate pattern crossing over the active fin on the substrate;

forming an interlayer insulating layer on the sacrificial gate pattern;

removing the sacrificial gate pattern to form a gap region exposing a lower portion Of the active fin in the interlayer insulating layer;

partially etching sidewalls of the lower portion of the active fin exposed by the gap region; and

oxidizing the lower portion of the active fin exposed by the gap region to form an insulation pattern between the active fin and the substrate.

6. A method of manufacturing a semiconductor device, the method comprising:

patterning a substrate to form an active fin;

forming a sacrificial gate pattern crossing over the active fin on the substrate;

forming an interlayer insulating layer on the sacrificial gate pattern;

removing the sacrificial gate pattern to form a gap region exposing a lower portion of the active fin in the interlayer insulating layer; and

oxidizing the lower portion of the active fin exposed by the gap region using an oxidation process,

wherein an upper portion of the substrate under the lower portion of the active fin is oxidized during the oxidation process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2014
From: KIM, SUNGMIN; SUK, SUNG-DAE; PARK, JAEHOO; CHA, DONGHO; HA, DAEWON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 032766/0486 →
Priority Claims (2)
KR 10-2013-0053207 · May 10, 2013 · national
KR 10-2013-0069736 · Jun 18, 2013 · national
Continuity (1)
Related Publication 20140335673A1 · Nov 13, 2014