IP Library Granted Patent US 9,142,770
Granted Patent B2
US 9,142,770 · App. 14/263,366 · Granted Sep 22, 2015

Resistive RAM devices and methods

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Quick Facts
Patent No.
US 9,142,770
App. No.
14/263,366
Granted
Sep 22, 2015
Kind
B2
Abstract

The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.

Claims (53)

1. A resistive random access memory (RRAM) device, comprising:

a first electrode formed over a portion of a nitride material;

an insulative material formed over a portion of the first electrode

a metal material, including a metal-metal oxide interface, formed over the portion of the first electrode in a via through the insulative material, wherein the metal material conformally fills the via, and wherein a portion of the metal material is oxidized; and

a second electrode formed over the selectively treated portion of the metal material.

2. The RRAM device of claim 1 , wherein the first electrode is formed over the portion of a silicon nitride material.

3. The RRAM device of claim 1 , wherein:

the metal material is a copper material; and

the metal material is patterned by damascene processing.

4. The RRAM device of claim 1 , wherein:

the metal material is a copper material; and

the metal material is patterned using single damascene processing.

5. The RRAM device of claim 1 , wherein:

the metal material is a copper material; and

the metal material is patterned using dual damascene processing.

6. The RRAM device of claim 1 , wherein the first electrode includes:

a functional metal material formed over the portion of a nitride material; and

a conducting metallic material formed over the functional metal material,

wherein the functional metal material is implemented for adhesion and stress relief.

7. A resistive random access memory (RRAM) device, comprising:

a first electrode formed over a portion of a nitride material;

a resistive element formed over the first electrode, the resistive element including:

an insulative material formed over the first electrode;

a via formed in the insulative material; and

a conducting material conformally filling the via, a portion that is less than all of the conducting material having been oxidized at a temperature below which thermal oxidation occurs; and

a second electrode formed over the resistive element.

8. A resistive random access memory (RRAM) device, comprising:

an oxide material formed over a portion of a nitride material;

a first electrode formed over a different portion of the nitride material; and

a resistive element formed over the first electrode, the resistive element including:

an insulative material formed over the oxide material and the first electrode;

a via formed in the insulative material over the first electrode;

a metal material filling the via, the metal material including a metal-metal oxide interface within the via.

9. The RRAM device of claim 8 , further comprising a second electrode formed over the resistive element and the insulative material, wherein the metal-metal oxide interface is a TiN—TiON interface.

10. A resistive random access memory (RRAM) device, comprising:

a first electrode formed over a portion of a nitride material;

an insulative material formed over a portion of the first electrode;

a metal material, including a metal-metal oxide interface, formed over the portion of the first electrode in a via through the insulative material, wherein the metal material conformally fills the via, and wherein the metal-metal oxide interface resulted from a portion of the metal material being oxidized at a temperature below which thermal oxidation occurs; and

a second electrode formed over the selectively treated portion of the metal material.

11. The RRAM device of claim 10 , wherein the metal-metal oxide interface resulted from a portion of the metal material being oxidized using plasma oxidation.

12. The RRAM device of claim 10 , wherein the metal-metal oxide interface resulted from a portion of the metal material being oxidized using a slot-plane-antenna (SPA) plasma oxidation process.

13. The RRAM device of claim 10 , wherein the metal-metal oxide interface resulted from a portion of the metal material being oxidized by exposure to a gas cluster ion beam (GCIB).

14. A resistive random access memory (RRAM) device, comprising:

a first electrode formed over a portion of a nitride material;

a metal material, including a metal-metal oxide interface, formed over the first electrode, wherein the metal-metal oxide interface includes one of: a TiN—TiON interface and a Cu—CuOx interface; and

a second electrode formed over the selectively treated portion of the metal material.

15. The RRAM device of claim 14 , wherein the metal material includes the TiN—TiON interface and a second TiN—TiON interface.

16. A resistive random access memory (RRAM) device, comprising:

a first electrode formed over a portion of a nitride material, wherein the first electrode includes:

an electrode metal material formed over the portion of the nitride material; and

a tungsten material formed over the electrode metal material;

a metal material, including a metal-metal oxide interface, formed over the first electrode; and

a second electrode formed over the selectively treated portion of the metal material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2014
From: GREELEY, JOSEPH N.; SMYTHE, JOHN A., III
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032770/0324 →