Stacked semiconductor die assemblies with support members and associated systems and methods
Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die.
1. A semiconductor die assembly, comprising:
a package substrate including a plurality of first bond pads;
a first semiconductor die attached to the package substrate, the first semiconductor die including a plurality of second bond pads;
a plurality of support members attached to the package substrate, the plurality of support members including a first support member and a second support member disposed on opposite sides of the first semiconductor die;
a second semiconductor die coupled to the plurality of support members such that at least a portion of the second semiconductor die is over the first semiconductor die, wherein the second semiconductor die extends over the second bond pads; and
a first die-attach film attaching each of the support members to the second semiconductor die, but not attaching the first semiconductor die to the second semiconductor die,
wherein the first die-attach film extends between the second semiconductor die and the first semiconductor die and between the second semiconductor die and each of the support members, and wherein the first die-attach film has a uniform thickness;
a second die-attach film attaching one of the support members to the package substrate;
a third die-attach film attaching the first semiconductor die to the package substrate; and
a plurality of wire bonds electrically coupling the first bond pads to corresponding ones of the second bond pads,
wherein the first bond pads are between the second and third die attach films, and wherein the wirebonds do not contact the first die attach film.
2. The semiconductor die assembly of claim 1 wherein the package substrate further includes a plurality of third bond pads electrically coupled to the second semiconductor die, wherein the third bond pads extend outside of the second semiconductor die.
3. The semiconductor die assembly of claim 2 , wherein the wirebonds are first wirebonds, and wherein the semiconductor die assembly further comprises a plurality of second wirebonds electrically coupling the third bond pads to corresponding bond pads of the second semiconductor die.
4. The semiconductor die assembly of claim 1 wherein the plurality of support members, the second semiconductor die, and the package substrate together define a cavity beneath the second semiconductor die, and wherein the semiconductor die assembly further comprises a package casing that includes an encapsulant at least partially extending into the cavity.
5. The semiconductor die assembly of claim 1 wherein the first semiconductor die does not contact the die attach film.
6. The semiconductor die assembly of claim 1 wherein the first die attach film includes a pressure-set film.
7. The semiconductor die assembly of claim 1 wherein the first semiconductor die is a memory die, and wherein the second memory die is a controller die.
8. The semiconductor die assembly of claim 7 wherein the memory die is a first memory die, and wherein the semiconductor die assembly further includes a second memory die stacked upon the first memory die.
9. The semiconductor die assembly of claim 1 wherein each of the support members includes an elongate member.
10. The semiconductor die assembly of claim 9 wherein the elongate member of one of the support members is in parallel with the elongate member of another one of the support members.
11. The semiconductor die assembly of claim 9 wherein the elongate member of one of the support members is perpendicular to the elongate member of another one of the support members.
12. The semiconductor die assembly of claim 9 wherein the elongate member of each of the support members comprises silicon.
13. A semiconductor die assembly, comprising:
a package substrate including a plurality of first bond pads;
a plurality of support members attached to and spaced apart from one another on the package substrate;
a first semiconductor die attached to the package substrate, positioned between the support members, and including a plurality of second bond pads;
a second semiconductor die coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die, wherein the second semiconductor die extends over the second bond pads; and
a first die-attach film attaching each of the support members to the second semiconductor die, but not attaching the first semiconductor die to the second semiconductor die,
wherein the first die-attach film extends between the second semiconductor die and the first semiconductor die and between the second semiconductor die and each of the support members;
a second die-attach film attaching one of the support members to the package substrate;
a third die-attach film attaching the first semiconductor die to the package substrate, wherein the first bond pads are between the second and third die attach films; and
a plurality of wire bonds electrically coupling the first bond pads to corresponding ones of the second bond pads, wherein the wirebonds are below the first die attach film.
14. The semiconductor die assembly of claim 13 wherein the first die-attach film has a uniform thickness.
15. The semiconductor die assembly of claim 13 wherein the wirebonds do not contact the first die attach film.
16. The semiconductor die assembly of claim 13 wherein the first semiconductor die is a memory die, and wherein the second semiconductor die is a controller die.
17. The semiconductor die assembly of claim 16 , further comprising a circuit component positioned below the memory die and at least partially within a footprint of the memory die, wherein the circuit component is separated from the controller die on the package substrate.
18. The semiconductor die assembly of claim 17 wherein the circuit component is a capacitor.