Phase change memory stack with treated sidewalls
Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.
1. A method for fabricating a memory device comprising:
forming multiple memory stacks having sidewalls, each memory stack formed by operations comprising:
forming a first carbon electrode over a word line material;
forming a selector device material over the first carbon electrode;
forming a second carbon electrode over the selector device material;
forming a phase change material over the second carbon electrode; and
forming a third carbon electrode over the phase change material; and
forming a liner material on sidewalls of each memory stack using a radio frequency (RF) physical vapor deposition (PVD) process, the liner material comprising an adhesion species and a dielectric such that the adhesion species intermixes with the carbon of the electrodes at an interface of the liner material and the sidewalk.
2. The method of claim 1 , wherein forming the liner material on the sidewalls comprises implanting a boron adhesion species into the sidewalls at an interface of the liner material with the sidewalls.
3. The method of claim 1 , wherein the RF PVD process comprises using a BN X target with an argon (Ar) plasma.
4. The method of claim 1 , wherein the RF PVD process comprises using a boron target with an N X plasma.
5. The method of claim 1 , wherein the RF PVD process comprises a combination of a PVD chamber pressure of 50-150 mT, an RF frequency greater than 13 MHz, and a substrate bias greater than 300 Watts.
6. A method for fabricating a memory device, comprising:
forming a plurality of multiple memory stacks having sidewalk, each memory stack formed by operations comprising:
forming a first carbon electrode layer over a material of either a word line or a bit line structure;
over the first carbon electrode layer, forming a stack structure including a selector device material layer and a phase change material layer on opposite sides of a second carbon electrode layer, wherein the phase change material layer comprises one or more chalcogenide materials; and
forming a third carbon electrode layer over the stack structure;
patterning the formed memory stack material layers to define multiple memory stacks having sidewalls; and
forming a liner material on sidewalls of each memory stack using a radio frequency (RF) physical vapor deposition (PVD) process, the liner material comprising an adhesion species and a dielectric such that the adhesion species intermixes with the carbon of the electrodes at an interface of the liner material and the sidewalls, and wherein the adhesion species and dielectric comprise the liner material.
7. The method for fabricating a memory device, of claim 6 , wherein forming the liner material on the sidewalls comprises implanting a boron-containing adhesion species into the sidewalls.
8. The method for fabricating a memory device, of claim 6 , wherein forming the stack structure comprises:
forming the a selector device material layer over the first electrode layer;
forming the second carbon electrode layer over the first electrode layer; and
forming the phase change material layer over the second carbon electrode layer.
9. The method for fabricating a memory device, of claim 6 , wherein forming the stack structure comprises:
forming the phase change material layer over the first electrode layer;
forming the second carbon electrode layer over the first electrode layer; and
forming the selector device material layer over the second carbon electrode layer.
10. The method of claim 6 , wherein the RF PVD process comprises using a BN X target with an argon (Ar) plasma.
11. The method of claim 6 , wherein the RF PVD process comprises using a boron target with an N X plasma.
12. The method of claim 6 , wherein the RF PVD process comprises a combination of an RF PVD chamber pressure of 50-150 mT, an RF frequency greater than 13 MHz, and a substrate bias greater than 300 Watts.