IP Library Granted Patent US 9,202,925
Granted Patent B2
US 9,202,925 · App. 14/278,234 · Granted Dec 1, 2015

Semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Hideomi Suzawa (Kanagawa, JP); Yutaka Okazaki (Kanagawa, JP); Hidekazu Miyairi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/8221H01L27/0688H01L29/42384H01L29/78603H01L29/78606H01L29/78696
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Quick Facts
Patent No.
US 9,202,925
App. No.
14/278,234
Granted
Dec 1, 2015
Kind
B2
Abstract

A structure is employed in which a first protective insulating layer; an oxide semiconductor layer over the first protective insulating layer; a source electrode and a drain electrode that are electrically connected to the oxide semiconductor layer; a gate insulating layer that is over the source electrode and the drain electrode and overlaps with the oxide semiconductor layer; a gate electrode that overlaps with the oxide semiconductor layer with the gate insulating layer provided therebetween; and a second protective insulating layer that covers the source electrode, the drain electrode, and the gate electrode are included. Furthermore, the first protective insulating layer and the second protective insulating layer each include an aluminum oxide film that includes an oxygen-excess region, and are in contact with each other in a region where the source electrode, the drain electrode, and the gate electrode are not provided.

Claims (49)

1. A semiconductor device comprising:

a first insulating layer comprising aluminum oxide;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode that are electrically connected to the oxide semiconductor layer;

a gate insulating layer that is over the source electrode and the drain electrode and overlaps with the oxide semiconductor layer;

a gate electrode that overlaps with the oxide semiconductor layer with the gate insulating layer provided therebetween; and

a second insulating layer comprising aluminum oxide that covers the source electrode, the drain electrode, and the gate electrode,

wherein the first insulating layer and the second insulating layer each include an oxygen-excess region, and

wherein the first insulating layer and the second insulating layer are in contact with each other in a region where the source electrode, the drain electrode, and the gate electrode are not provided.

2. The semiconductor device according to claim 1 ,

wherein the gate electrode covers a top surface and a side surface of the oxide semiconductor layer with the gate insulating layer provided therebetween.

3. The semiconductor device according to claim 1 ,

wherein a thickness of the oxide semiconductor layer is 0.1 times or more and 10 times or less as large as a channel width.

4. The semiconductor device according to claim 1 , further comprising:

a first oxide layer between the first insulating layer and the oxide semiconductor layer, the first oxide layer comprising at least one metal element contained in the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the gate insulating layer, the second oxide layer comprising at least one metal element contained in the oxide semiconductor layer,

wherein a conduction band minimum of the first oxide layer and a conduction band minimum of the second oxide layer are each closer to a vacuum level than a conduction band minimum of the oxide semiconductor layer,

wherein a difference between energy at the conduction band minimum of the first oxide layer and energy at the conduction band minimum of the oxide semiconductor layer is 0.05 eV or higher and 2 eV or lower, and

wherein a difference between energy at the conduction band minimum of the second oxide layer and the energy at the conduction band minimum of the oxide semiconductor layer is 0.05 eV or higher and 2 eV or lower.

5. The semiconductor device according to claim 4 ,

wherein a top surface of the second oxide layer is in contact with an undersurface of the source electrode, an undersurface of the drain electrode, and an undersurface of the gate insulating layer.

6. The semiconductor device according to claim 4 ,

wherein an undersurface of the second oxide layer is in contact with a top surface of the source electrode, a top surface of the drain electrode, and a top surface and a side surface of the oxide semiconductor layer in a region where the source electrode and the drain electrode are not provided.

7. The semiconductor device according to claim 1 , wherein a thickness of the oxide semiconductor layer where the source electrode and the drain electrode do not overlap is smaller than a thickness of the oxide semiconductor layer where the source electrode or the drain electrode overlaps.

8. The semiconductor device according to claim 1 , further comprising a third insulating layer between the first insulating layer and the oxide semiconductor layer.

9. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises crystal.

10. The semiconductor device according to claim 9 , wherein a c-axis of the crystal is substantially perpendicular to a surface where the oxide semiconductor layer is formed or a surface of the oxide semiconductor layer.

11. A semiconductor device comprising:

a first insulating layer including a groove;

a second insulating layer comprising aluminum oxide that covers a side surface and a bottom surface of the groove;

an oxide semiconductor layer that is over the second insulating layer and fills the groove;

a source electrode and a drain electrode that are electrically connected to the oxide semiconductor layer;

a gate insulating layer that is over the source electrode and the drain electrode and overlaps with the oxide semiconductor layer;

a gate electrode that overlaps with the oxide semiconductor layer with the gate insulating layer provided therebetween; and

a third insulating layer comprising aluminum oxide that covers the source electrode, the drain electrode, and the gate electrode,

wherein the second insulating layer and the third insulating layer each include an oxygen-excess region, and

wherein the second insulating layer and the third insulating layer are in contact with each other in a region where the source electrode, the drain electrode, and the gate electrode are not provided.

12. The semiconductor device according to claim 11 , further comprising:

a first oxide layer between the second insulating layer and the oxide semiconductor layer, the first oxide layer comprising at least one metal element contained in the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the gate insulating layer, the second oxide layer comprising at least one metal element contained in the oxide semiconductor layer,

wherein a conduction band minimum of the first oxide layer and a conduction band minimum of the second oxide layer are each closer to a vacuum level than a conduction band minimum of the oxide semiconductor layer,

wherein a difference between energy at the conduction band minimum of the first oxide layer and energy at the conduction band minimum of the oxide semiconductor layer is 0.05 eV or higher and 2 eV or lower, and

wherein a difference between energy at the conduction band minimum of the second oxide layer and the energy at the conduction band minimum of the oxide semiconductor layer is 0.05 eV or higher and 2 eV or lower.

13. The semiconductor device according to claim 12 ,

wherein an undersurface of the second oxide layer is in contact with a top surface of the source electrode, a top surface of the drain electrode, and a top surface of the oxide semiconductor layer in a region where the source electrode and the drain electrode are not provided.

14. The semiconductor device according to claim 11 , wherein a thickness of the oxide semiconductor layer where the source electrode and the drain electrode do not overlap is smaller than a thickness of the oxide semiconductor layer where the source electrode or the drain electrode overlaps.

15. The semiconductor device according to claim 11 , further comprising a fourth insulating layer between the second insulating layer and the oxide semiconductor layer.

16. The semiconductor device according to claim 11 , wherein the oxide semiconductor layer comprises crystal.

17. The semiconductor device according to claim 16 , wherein a c-axis of the crystal is substantially perpendicular to a surface where the oxide semiconductor layer is formed or a surface of the oxide semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2014
From: YAMAZAKI, SHUNPEI; SUZAWA, HIDEOMI; OKAZAKI, YUTAKA; MIYAIRI, HIDEKAZU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 032932/0942 →
Priority Claims (2)
JP 2013-106223 · May 20, 2013 · national
JP 2013-106253 · May 20, 2013 · national
Continuity (1)
Related Publication 20140339546A1 · Nov 20, 2014