IP Library › Granted Patent US 9,077,288
Granted Patent B2
US 9,077,288 · App. 14/278,745 · Granted Jul 7, 2015

Amplifier circuit and image sensor using amplifier circuit

Inventor: Hiroyuki Sekine (Kanagawa, JP)
Assignee: NLT TECHNOLOGIES, LTD.
H03F3/16H04N5/32H04N5/3745H01L27/14609H01L27/14658
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Quick Facts
Patent No.
US 9,077,288
App. No.
14/278,745
Granted
Jul 7, 2015
Kind
B2
Abstract

There is a problem that in an image sensor including an amplifier in each pixel, when a thin-film semiconductor is used as a transistor constituting the amplifier, voltage continues to be applied between source and gate of the transistor and thereby a threshold voltage value of the transistor varies, resulting in a variation of signal voltage. To solve the problem, a thin-film transistor formed with an oxide semiconductor is used as the transistor constituting the amplifier, and during a period other than a period of outputting an output of the amplifier, source potential of the transistor is controlled to be equal to drain potential thereof.

Claims (36)

1. An amplifier circuit outputting current in accordance with voltage applied to an input terminal thereof, the amplifier circuit comprising:

at least one transistor including

a gate terminal connected to the input terminal and

a source terminal connected to an output terminal of the amplifier circuit,

wherein the amplifier circuit performs an operation including an output period of outputting a signal and a stop period of outputting no signal,

wherein during the stop period,

a controller controls potential of the source terminal of the transistor to be equal to potential of a drain terminal of the transistor and

potential of the drain terminal of the transistor is always higher than potential of the gate terminal thereof.

2. The amplifier circuit according to claim 1 ,

wherein the transistor is formed with an oxide semiconductor.

3. An image sensor comprising an amplifier circuit and a photoelectric converter in each pixel,

wherein the photoelectric converter includes a photoelectric conversion device and a first transistor connected in series,

the amplifier circuit includes a second transistor including

a gate terminal connected to a junction of the photoelectric conversion device and the first transistor and a source terminal connected to a reading wiring via a third transistor,

the first transistor functions to reset the photoelectric conversion device at constant potential by a first control signal, and

the third transistor functions to output an output of the amplifier circuit to the reading wiring by a second control signal,

wherein during a period other than a period of outputting the output of the amplifier circuit to the reading wiring,

a controller controls potential of the source terminal of the second transistor to be equal to potential of a drain terminal thereof, and

the potential of the drain terminal of the second transistor is always higher than potential of the gate terminal thereof.

4. The image sensor according to claim 3 ,

wherein the controller comprises a fourth transistor connected in parallel to the source terminal and the drain terminal of the second transistor and

a gate terminal of the fourth transistor is controlled by a third control signal differing from the first control signal and the second control signal.

5. The image sensor according to claim 3 ,

wherein the controller comprises a fourth transistor connected in parallel to the source terminal and the drain terminal of the second transistor,

a fifth transistor including a drain terminal and a gate terminal connected to the first control signal and a source terminal connected to a gate terminal of the fourth transistor, and

a sixth transistor including a gate terminal connected to the second control signal, a source terminal connected to a power supply, and a drain terminal connected to the gate terminal of the fourth transistor.

6. The image sensor according to claim 3 ,

wherein the controller comprises a seventh transistor and a first capacitor connected in series, and

the seventh transistor includes a gate terminal connected to the first control signal, a drain terminal connected to the drain terminal of the second transistor, and a source terminal connected to the source terminal of the second transistor.

7. The image sensor according to claim 3 ,

wherein at least the second transistor is formed with an oxide semiconductor.

8. The image sensor according to claim 3 ,

wherein the photoelectric conversion device comprises a photodiode and a phosphor.

9. The image sensor according to claim 3 ,

wherein the photoelectric conversion device comprises a photoconductive layer sandwiched by two electrodes and a second capacitor connected in series to the photoconductive layer, and

the drain terminal of the first transistor is connected to a junction of the photoconductive layer and the second capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2014
From: SEKINE, HIROYUKI
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 034228/0401 →
Priority Claims (1)
JP 2013-105641 · May 17, 2013 · national
Continuity (1)
Related Publication 20140339432A1 · Nov 20, 2014