IP Library Granted Patent US 9,356,009
Granted Patent B2
US 9,356,009 · App. 14/287,418 · Granted May 31, 2016

Interconnect structure with redundant electrical connectors and associated systems and methods

Inventor: Anilkumar Chandolu (Boise, ID)
Assignee: Micron Technology, Inc.
H01L25/18H01L23/3675H01L24/17H01L24/81H01L25/0657H01L25/50H01L2224/16113H01L2224/16145H01L2224/73253H01L2224/81815H01L2225/06513H01L2225/06517H01L2225/06541H01L2225/06582H01L2225/06589H01L2924/1033H01L2924/10253H01L2924/14H01L2924/1431H01L2924/1434H01L2924/1436H01L2924/1437H01L2924/15311H01L2924/16235H01L2924/16251
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Quick Facts
Patent No.
US 9,356,009
App. No.
14/287,418
Granted
May 31, 2016
Kind
B2
Abstract

Semiconductor die assemblies having interconnect structures with redundant electrical connectors are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die, a second semiconductor die, and an interconnect structure between the first and the second semiconductor dies. The interconnect structure includes a first conductive film coupled to the first semiconductor die and a second conductive film coupled to the second semiconductor die. The interconnect structure further includes a plurality of redundant electrical connectors extending between the first and second conductive films and electrically coupled to one another via the first conductive film.

Claims (56)

1. A semiconductor die assembly, comprising:

a first semiconductor die;

a second semiconductor die; and

an interconnect structure coupling the first semiconductor die to the second semiconductor die, wherein the interconnect structure is between the first and second semiconductor dies, and wherein the interconnect structure includes—

a first conductive film coupled to the first semiconductor die,

a second conductive film coupled to the second semiconductor die, and

a plurality of redundant electrical connectors extending between and attached to the first and second conductive films, wherein all of the redundant electrical connectors are electrically coupled to one another via the first conductive film.

2. The semiconductor die assembly of claim 1 wherein the interconnect structure further includes another redundant electrical connector that is attached to the first conductive film and separated from the second conductive film.

3. The semiconductor die assembly of claim 1 wherein the redundant electrical connectors each include:

a conductive member coupled to the first conductive film; and

a solder material coupled to the conductive member,

wherein the interconnect structure further includes (1) another redundant electrical connector having a conductive member and (2) a solder material that fails to electrically connect the conductive member of the other redundant electrical connector with the second conductive film.

4. The semiconductor die assembly of claim 1 wherein:

the first semiconductor die includes a first substrate and a first through-substrate via (TSV) extending through the first substrate, wherein the first TSV is coupled to the first conductive film; and

the second semiconductor die includes a second substrate and a second TSV extending through the second substrate, wherein the second TSV is coupled to the second conductive film.

5. The semiconductor die assembly of claim 1 wherein:

the first semiconductor die includes a substrate and a through-substrate via (TSV) extending through the substrate, wherein the TSV is coupled to the first conductive film; and

at least one of the redundant electrical connectors extends between the TSV and the second conductive film.

6. The semiconductor die assembly of claim 1 wherein each of the first and second conductive films includes a conductive trace.

7. The semiconductor die assembly of claim 1 wherein:

the first semiconductor die is a logic die or a memory die; and

the second semiconductor die is a logic die or a memory die.

8. A semiconductor die assembly, comprising:

a first semiconductor die having a first conductive trace;

a second semiconductor die having a second conductive trace;

a plurality of redundant electrical connectors extending between the first and second conductive traces, wherein each of the redundant electrical connectors includes—

a conductive member coupled to the first conductive trace, wherein the conductive member includes an end portion, and

a conductive bond material between the conductive member and the second conductive trace, wherein the conductive bond material is bonded to the end portion of the conductive member,

wherein all of the redundant electrical connectors are coupled to the first conductive trace.

9. A semiconductor die assembly, comprising:

a first semiconductor die having a first conductive trace;

a second semiconductor die having a second conductive trace;

a plurality of redundant electrical connectors extending between the first and second conductive traces, wherein each of the redundant electrical connectors includes—

a conductive member coupled to the first conductive trace, wherein the conductive member includes an end portion; and

a conductive bond material between the conductive member and the second conductive trace, wherein the conductive bond material is bonded to the end portion of the conductive member,

wherein—

the conductive bond material of at least one of the redundant electrical connectors is bonded only to the end portion of the conductive member, and

at least another one of the redundant electrical connectors is electrically coupled to the first conductive trace.

10. The semiconductor die assembly of claim 8 wherein each of the redundant electrical connectors further includes a bond pad between the conductive bond material and the second conductive trace.

11. The semiconductor die assembly of claim 8 wherein each of the conductive members includes a conductive pillar that projects toward the second conductive trace.

12. The semiconductor die assembly of claim 8 wherein each of the conductive members includes:

a raised bond coupled to the second conductive trace; and

a conductive pillar coupled to the first conductive trace and projecting toward the raised bond pad.

13. The semiconductor die assembly of claim 8 wherein the conductive bond material includes metal solder.

14. The semiconductor die assembly of claim 8 wherein the first semiconductor die includes a substrate and a through-substrate via (TSV) extending through the substrate, wherein the TSV is coupled to the first conductive trace.

15. A semiconductor die assembly, comprising:

a first semiconductor die having a first conductive trace;

a second semiconductor die having a second conductive trace; and

a plurality of redundant conductive members coupled to the first conductive trace and extending vertically toward the second semiconductor die, wherein the redundant conductive members are electrically coupled to one another via the first conductive traces, and wherein all of the redundant conductive members are coupled to the second conductive trace of the second semiconductor die.

16. The semiconductor die assembly of claim 15 wherein the redundant conductive members are spaced laterally apart from one another and configured to transfer heat between the first and second semiconductor dies.

17. The semiconductor die assembly of claim 16 , further comprising:

a package substrate carrying the second semiconductor die; and

a thermally conductive casing at least partially enclosing the first and second semiconductor dies within an enclosure.

18. The semiconductor die assembly of claim 15 , further comprising:

another conductive member coupled to the first conductive trace, the conductive member having an end portion separated from the first and second conductive traces; and

metal solder attached only to the end portion of the other redundant conductive member.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: CHANDOLU, ANILKUMAR
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032965/0237 →
Continuity (1)
Related Publication 20150348954A1 · Dec 3, 2015