Power module having stacked flip-chip and method for fabricating the power module
View Patent ↗Provided are a power module having a stacked flip-chip and a method of fabricating the power module. The power module includes a lead frame; a control device part including a control device chip; a power device part including a power device chip and being electrically connected to the lead frame; and an interconnecting substrate of which the control and power device parts are respectively disposed at upper and lower portions, and each of the control and power device chips may be attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method. The method includes forming bumps on power and control device chips on a wafer level; separately sawing the power and control device chips into individual chips; adhering the power device chip onto a thermal substrate and the control device chip onto an interconnecting substrate; combining a lead frame, the thermal substrate, and the interconnecting substrate with one another in a multi-jig; and sealing the power and control device chips, and the control and power device chips may be attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method.
1. A method of fabricating a power module, comprising:
forming bumps on power and control device chips on a wafer level;
separately sawing the power and control device chips into individual chips;
adhering the power device chip onto a thermal substrate and the control device chip onto an interconnecting substrate;
combining a lead frame, the thermal substrate, and the interconnecting substrate with one another in a multi-jig; and
sealing the power and control device chips,
wherein the control and power device chips are attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method,
wherein the lead frame comprises first and second lead frame portions, wherein the first lead frame portion extends underneath the interconnecting substrate, and the second lead frame portion extends on the interconnecting substrate;
wherein the power device part is disposed between the first lead frame portion and the thermal substrate; and
wherein the power device chip of the power device part is attached to a lower surface of the first lead frame portion using a flip-chip bonding method.
2. The method of claim 1 , wherein the bumps are formed on the lead frame and the interconnecting substrate.
3. The method of claim 1 , further comprising:
performing a reflow process after the combining of the lead frame, the thermal substrate, and the interconnecting substrate and the sealing of the power and control device chips;
plating a predetermined portion of the lead frame outside the sealant after the sealing the power and control device chips;
trimming the predetermined portion of the lead frame; and
performing test and packing processes.
4. The method of claim 3 , wherein the reflow process comprises a flux cleaning process.
5. The method of claim 1 , wherein:
the first lead frame portion is formed underneath the interconnecting substrate in a W shape to be attached to the interconnecting substrate;
a metal wire layer is formed on upper surfaces of the power device chips of the power device part; and
the power device chip of the power device part is attached to the W-shaped lower portion of the first lead frame portion through a solder adhesive of solder wire or solder paste type to be connected to the metal wire layer.
6. The method of claim 1 , wherein the control device chip of the control device part is attached to an upper surface of the interconnecting substrate using a flip-chip bonding method.
7. The method of claim 1 , wherein upper and lower boards are attached to each other to form the interconnecting substrate, and predetermined patterns are formed on the lower board of the interconnecting substrate so as to dispose the first lead frame portion among the predetermined patterns.
8. The method of claim 1 , wherein the power device chips are adhered onto the thermal substrate using solder screen print, and the control device chips are adhered onto the interconnecting substrate using solder balls, solder paste dotting or dispense, or thermal press.
9. The method of claim 1 , wherein the combination of the lead frame, the thermal substrate, and the interconnecting substrate is performed using solder paste dotting or solder screen print.
10. The method of claim 1 , wherein the power and control device chips are attached to one of the interconnecting substrate and the first lead frame portion using bumps or solder or bumps and solder.
11. A method of fabricating an electronic apparatus containing a power module, comprising:
providing a power module by:
forming bumps on power and control device chips on a wafer level;
separately sawing the power and control device chips into individual chips;
adhering the power device chip onto a thermal substrate and the control device chip onto an interconnecting substrate, the lead frame comprising first and second lead frame portions, wherein the first lead frame portion extends underneath the interconnecting substrate, and the second lead frame portion extends on the interconnecting substrate;
combining a lead frame, the thermal substrate, and the interconnecting substrate with one another in a multi-jig; and
sealing the power and control device chips,
wherein the control and power device chips are attached to one of the lead frame and the interconnecting substrate using a flip-chip bonding method,
wherein the power device part is disposed between the first lead frame portion and the thermal substrate; and
wherein the power device chip of the power device part is attached to a lower surface of the first lead frame portion using a flip-chip bonding method; and
connecting the power module to a circuit board.
12. The method of claim 11 , wherein the bumps are formed on the lead frame and the interconnecting substrate.
13. The method of claim 1 , further comprising:
performing a reflow process after the combining of the lead frame, the thermal substrate, and the interconnecting substrate and the sealing of the power and control device chips;
plating a predetermined portion of the lead frame outside the sealant after the sealing the power and control device chips;
trimming the predetermined portion of the lead frame; and
performing test and packing processes.
14. The method of claim 11 , wherein the reflow process comprises a flux cleaning process.
15. The method of claim 11 , wherein:
the first lead frame portion is formed underneath the interconnecting substrate in a W shape to be attached to the interconnecting substrate;
a metal wire layer is formed on upper surfaces of the power device chips of the power device part; and
the power device chip of the power device part is attached to the W-shaped lower portion of the first lead frame portion through a solder adhesive of solder wire or solder paste type to be connected to the metal wire layer.
16. The method of claim 11 , wherein the control device chip of the control device part is attached to an upper surface of the interconnecting substrate using a flip-chip bonding method.
17. The method of claim 11 , wherein upper and lower boards are attached to each other to form the interconnecting substrate, and predetermined patterns are formed on the lower board of the interconnecting substrate so as to dispose the first lead frame portion among the predetermined patterns.
18. The method of claim 11 , wherein the power device chips are adhered onto the thermal substrate using solder screen print, and the control device chips are adhered onto the interconnecting substrate using solder balls, solder paste dotting or dispense, or thermal press.
19. The method of claim 11 , wherein the combination of the lead frame, the thermal substrate, and the interconnecting substrate is performed using solder paste dotting or solder screen print.
20. The method of claim 11 , wherein the power and control device chips are attached to one of the interconnecting substrate and the first lead frame portion using bumps or solder or bumps and solder.