IP Library Granted Patent US 9,558,116
Granted Patent B2
US 9,558,116 · App. 14/295,062 · Granted Jan 31, 2017

Coherence de-coupling buffer

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Quick Facts
Patent No.
US 9,558,116
App. No.
14/295,062
Granted
Jan 31, 2017
Kind
B2
Abstract

A coherence decoupling buffer. In accordance with a first embodiment, a coherence decoupling buffer is for storing tag information of cache lines evicted from a plurality of cache memories. A coherence decoupling buffer may be free of value information of the plurality of cache memories. A coherence decoupling buffer may also be combined with a coherence memory.

Claims (30)

1. An apparatus comprising:

a local caching agent configured to communicate with a remote source;

at least one local cache memory configured to store cache line tags and cache line data for the local caching agent;

a coherence memory configured to store the cache line tags if the cache line tags are stored in the at least one local cache memory; and

a coherence decoupling buffer coupled to the at least one local cache memory and the coherence memory and configured to store an evicted cache line tag of a cache line evicted from the at least one local cache memory in response to unavailability of space for a new cache line in the at least one local cache memory, wherein the coherence memory and the coherence decoupling buffer are configured to filter communications from the remote source to the local caching agent.

2. The apparatus of claim 1 , further comprising a main memory.

3. The apparatus of claim 2 , wherein the coherence memory is coupled to the main memory.

4. The apparatus of claim 1 , wherein the coherence memory is operable to respond to a remote snoop directed to a cache line of the at least one local cache memory, wherein the local caching agent comprises a processor, and wherein the remote snoop originates from the remote source.

5. The apparatus of claim 1 , wherein the coherence decoupling buffer is operable to respond to a remote snoop directed to an evicted cache line of the at least one local cache memory, wherein the local caching agent comprises a processor, and wherein the remote snoop originates from the remote source.

6. The apparatus of claim 1 , wherein the coherence memory is at a top of a caching hierarchy.

7. The apparatus of claim 1 , wherein the coherence decoupling buffer comprises a capacity that is of substantially less capacity than a total capacity of the at least one local cache memory.

8. An apparatus comprising:

a local caching agent configured to communicate with a remote source;

at least one local cache memory configured to store cache line tags and cache line data for the local caching agent;

a coherence memory configured to store the cache line tags if the cache line tags are stored in the at least one local cache memory and configured to filter a remote snoop from the remote source to the local caching agent; and

a coherence decoupling buffer coupled to the at least one local cache memory and the coherence memory and configured to store an evicted cache line tag of a cache line evicted from the at least one local cache memory in response to unavailability of space for a new cache line in the at least one local cache memory, wherein if the remote snoop is directed to the cache line evicted from the at least one local cache memory, the coherence decoupling buffer is configured to filter the remote snoop.

9. The apparatus of claim 8 , further comprising a main memory.

10. The apparatus of claim 9 , wherein the coherence memory is coupled to the main memory.

11. The apparatus of claim 8 , wherein the remote snoop comprises a read-only snoop, and wherein the local caching agent comprises a processor.

12. The apparatus of claim 8 , wherein the coherence memory and the coherence decoupling buffer increase cache performance.

13. The apparatus of claim 8 , wherein the coherence memory is at a top of a caching hierarchy.

14. The apparatus of claim 8 , wherein the coherence decoupling buffer comprises a capacity that is of substantially less capacity than a total capacity of the at least one local cache memory.

15. A method comprising:

filtering a remote snoop from a remote source to a local caching agent by using a coherence memory configured to store cache line tags if the cache line tags are stored in at least one local cache memory for the local caching agent configured to communicate with the remote source; and

if the remote snoop is directed to a cache line evicted from the at least one local cache memory, filtering the remote snoop by using a coherence decoupling buffer configured to store an evicted cache line tag of the cache line evicted from the at least one local cache memory in response to unavailability of space for a new cache line in the at least one local cache memory.

16. The method of claim 15 , wherein the coherence memory is coupled to a main memory.

17. The method of claim 15 , wherein the remote snoop is a read-only snoop, and wherein the local caching agent comprises a processor.

18. The method of claim 15 , wherein the coherence memory and the coherence decoupling buffer increase cache performance.

19. The method of claim 15 , wherein the coherence memory is at a top of a caching hierarchy.

20. The method of claim 15 , wherein the coherence decoupling buffer comprises a capacity that is of substantially less capacity than a total capacity of the at least one local cache memory.

Assignments (9)
CHANGE OF NAME Recorded Mar 4, 2022
From: FACEBOOK, INC.
To: META PLATFORMS, INC.
Reel/Frame 059320/0484 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYANCE TYPE TO MERGER PREVIOUSLY RECORDED AT REEL: 058996 FRAME: 0895. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER . Recorded Feb 25, 2022
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 059248/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2022
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 059085/0188 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2022
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 058996/0895 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2022
From: ROZAS, GUILLERMO J.
To: TRANSMETA CORPORATION
Reel/Frame 058996/0910 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2019
From: INTELLECTUAL VENTURES ASSETS 88 LLC
To: FACEBOOK, INC.
Reel/Frame 048136/0179 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2018
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 88 LLC
Reel/Frame 047014/0629 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 036711 FRAME: 0160. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
MERGER Recorded Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →