Stacked leadframe packages
View Patent ↗A multi-package unit having stacked packages is provided. A multi-package unit may include a first package and a second package mounted on the first package. The first package may be a leadframe package that includes metal leads extending beyond the perimeter of the first package. The first package may include a first integrated circuit die assembled within the first package using the wirebond configuration or the flip-chip configuration. The second package may be a leadframe package or a leadless package that includes a second integrated circuit die. The second package may be smaller than the first package. The first and second integrated circuit dies may be formed using different integrated circuit fabrication technologies.
1. Circuitry, comprising:
a substrate;
a first integrated circuit package formed on the substrate, wherein the first integrated circuit package comprises a leadframe package, and wherein the first integrated circuit package includes contact pads formed in a top surface of the first integrated circuit package;
a second integrated circuit package that is formed separately from the first integrated circuit package and that is stacked on the top surface of the first integrated circuit package, wherein the second integrated circuit package comprises another leadframe package having leads that directly contact the contact pads of the first integrated circuit package, and wherein the first integrated circuit package includes an integrated circuit die having a first surface that faces the substrate and a second surface that faces the second integrated circuit package; and
bonding wires attached to the first surface of the integrated circuit die.
2. The circuitry defined in claim 1 , wherein the first integrated circuit package includes protruding leads.
3. The circuitry defined in claim 2 , wherein the leads extend beyond the perimeter of the first package.
4. The circuitry defined in claim 2 , wherein the substrate comprises a printed circuit board.
5. The circuitry defined in claim 2 , wherein the first integrated circuit package includes an integrated circuit die mounted in a wirebond configuration.
6. The circuitry defined in claim 2 , wherein the first integrated circuit package includes an integrated circuit die mounted in a flip-chip configuration.
7. The circuitry defined in claim 2 , wherein the first integrated circuit package has a first footprint, and wherein the second integrated circuit package has a second footprint that is smaller than the first footprint.
8. A multi-package unit, comprising:
a first package; and
a second package that is formed separately from the first package and that is mounted on a surface of the first package, wherein the first package includes contact pads formed in the surface of the first package, leads, and conductive paths coupling the contact pads directly to the leads.
9. The multi-package unit defined in claim 8 , wherein the first package includes an integrated circuit die that is coupled to the contact pads via first respective wires and that is coupled to the leads via second respective wires.
10. The multi-package unit defined in claim 9 , wherein the integrated circuit die is mounted in a flip-chip configuration within the first package.
11. The multi-package unit defined in claim 10 , wherein the first package includes an interposer coupled between the integrated circuit die and the surface of the first package.
12. The multi-package unit defined in claim 11 , wherein an integrated circuit die in the second package communicates with the integrated circuit die in the first package via the interposer.
13. Circuitry, comprising:
a substrate;
a first integrated circuit package formed on the substrate, wherein the first integrated circuit package comprises a leadframe package, and wherein the first integrated circuit package includes contact pads formed in a top surface of the first integrated circuit package;
a second integrated circuit package that is formed separately from the first integrated circuit package and that is stacked on the top surface of the first integrated circuit package, wherein the second integrated circuit package comprises a flip-chip package having external bumps that directly contact the contact pads of the first integrated circuit package, and wherein the first integrated circuit package includes an integrated circuit die having a first surface that faces the substrate and a second surface that faces the second integrated circuit package; and
bonding wires attached to the first surface of the integrated circuit die.