Semiconductor device comprising trench gate and buried source electrodes
A semiconductor device includes a semiconductor substrate, a trench, a buried insulated source electrode arranged in a bottom portion of the trench, a first gate electrode and a second gate electrode arranged in an upper portion of the trench and spaced apart from one another. A surface gate contact extends into the upper portion of the trench and is in physical and electrical contact with the first gate electrode and second gate electrode.
1. A method comprising:
providing a semiconductor substrate including a trench having an open end, a buried insulated source electrode being arranged in a bottom portion of the trench and at least one gate electrode being arranged in an upper portion of the trench, the trench further including a spacer extending from the buried insulated source electrode to the at least one gate electrode and having a portion exposed in the open end of the trench;
selectively removing the spacer from the trench exposing at least a portion of the at least one gate electrode; and
depositing an electrically conductive material into the trench to form a contact to the at least one gate electrode.
2. The method of claim 1 , wherein the spacer is removed by selective etching, the material of the spacer being selectively etched over the material of the at least one gate electrode by a factor of 1.5:1 to 100:1.
3. A method comprising:
providing a semiconductor substrate including a trench, side walls of the trench being lined with an electrically insulating oxide, a buried insulated source electrode being arranged in a bottom portion of the trench and a spacer extending from the buried insulated source electrode to an open end of the trench;
selectively removing the oxide in an upper portion of the trench;
depositing polysilicon into the upper portion of the trench to form at least one gate electrode arranged in the upper portion of the trench;
selectively removing the spacer from the trench exposing at least a portion of the at least one gate electrode; and
depositing an electrically conductive material into the trench to form a contact to the at least one gate electrode.
4. The method of claim 3 , wherein the oxide is selectively removed to provide two shallow trenches arranged on opposing sides of the spacer and extending in the trench lengthwise.
5. The method of claim 4 , wherein the polysilicon is deposited in the two shallow trenches to form two gate electrode wings electrically insulated from one another by the spacer and from the semiconductor substrate by a gate oxide layer arranged on the side walls of the trench.
6. The method of claim 3 , wherein after depositing the electrically conductive material, the electrically conductive material is structured so that a surface source contact and a surface gate contact are electrically insulated from one another.
7. The method of claim 4 , wherein the spacer includes an electrically conductive material, a dielectric layer is deposited on the buried insulated source electrode and afterwards the spacer is deposited on the dielectric layer.