IP Library Granted Patent US 9,525,282
Granted Patent B2
US 9,525,282 · App. 14/307,051 · Granted Dec 20, 2016

Ground fault circuit interrupter (GFCI) monitor

Inventor: Bruce Armstrong (San Mateo, CA)
Assignee: Fairchild Semiconductor Corporation
H02H3/162G01R31/3272H02H3/334
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Quick Facts
Patent No.
US 9,525,282
App. No.
14/307,051
Granted
Dec 20, 2016
Kind
B2
Abstract

This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.

Claims (45)

1. A system, comprising:

a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power;

a GFCI controller configured to detect a ground fault and to provide an enable signal to a semiconductor switch to interrupt AC power to a load in response to the detected ground fault; and

a diode configured to prevent interruption of AC power during the second half-cycle of the first cycle of AC power,

wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage during the first half-cycle of AC power, the SCR configured to control a solenoid, and

wherein the ST GFCI monitor is configured to detect an open circuit or high impedance condition during the first half-cycle of AC power using the comparison of the anode voltage of the SCR to the threshold voltage.

2. The system of claim 1 , wherein the semiconductor switch includes the silicon-controlled rectifier (SCR), and

wherein the ST GFCI monitor is configured to detect if the SCR is enabled in response to the simulated ground fault.

3. The system of claim 2 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the SCR is not enabled in response to the simulated ground fault.

4. The system of claim 1 , including:

load contacts;

the solenoid configured to open or close the load contacts, wherein closed load contacts are configured to couple the AC power and the load and open load contacts are configured to decouple the AC power and the load; and

the semiconductor switch, including a silicon-controlled rectifier (SCR) configured to control the solenoid.

5. The system of claim 4 , including:

wherein the ST GFCI monitor is coupled to the SCR and to the diode,

wherein the diode is coupled to the SCR, to the ST GFCI monitor, and to the solenoid,

wherein the solenoid is coupled to the diode and to the load contacts, and

wherein the SCR is configured to control current through the solenoid.

6. The system of claim 1 , wherein the threshold voltage includes a voltage in a range of 60 Volts RMS through 105 Volts RMS.

7. The system of claim 1 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the anode voltage of the SCR is less than the threshold voltage.

8. The system of claim 7 , wherein the ST GFCI monitor is configured to detect a manual self-test and to reset the ST GFCI monitor if a manual self-test is detected.

9. The system of claim 1 , wherein the first half-cycle of AC power includes a positive half-cycle of AC power, and wherein the second half-cycle of AC power includes a negative half-cycle of AC power.

10. The system of claim 1 , wherein the first half-cycle of AC power includes a negative half-cycle of AC power, and wherein the second half-cycle of AC power includes a positive half-cycle of AC power.

11. The system of claim 1 , wherein the ST GFCI monitor is configured to generate the simulated ground fault to test functionality of the silicon-controlled rectifier (SCR) without interrupting AC power to a load, to bias the SCR during the second half-cycle of the first cycle of AC power, and to detect if the SCR is enabled in response to the simulated ground fault to test functionality of the SCR.

12. The system of claim 1 , wherein the semiconductor switch includes a silicon-controlled rectifier (SCR), and

wherein the GFCI controller is configured to enable the SCR to interrupt AC power to the load in response to the detected ground fault.

13. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault at a periodic interval.

14. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault a first period of time following at least one of power-on or reset of the ST GFCI monitor and at a periodic interval following the first simulated fault.

15. The system of claim 1 , including:

a first integrated circuit including the ST GFCI monitor; and

a second integrated circuit including the GFCI controller.

16. A method, comprising:

generating a simulated ground fault, using a self-test (ST) ground fault circuit interrupter (GFCI) monitor, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power; and

detecting a ground fault using a GFCI controller, and providing an enable signal to a semiconductor switch to interrupt AC power to a load in response to the detected ground fault; and

preventing interruption of AC power during the second half-cycle of the first cycle of AC power using a diode,

comparing an anode voltage of a silicon-controlled rectifier (SCR), configured to control a solenoid, to a threshold voltage during the first half-cycle of AC power using a comparator to detect an open circuit or high impedance condition.

17. The method of claim 16 , including:

detecting if the semiconductor switch is enabled in response to the simulated ground fault using the ST GFCI monitor; and

generating an end-of-life (EOL) signal if the SCR is not enabled in response to the simulated ground fault.

18. The method of claim 16 , including:

opening or closing load contacts to couple or decouple the AC power and the load, respectively; and

controlling the solenoid using the semiconductor switch, the semiconductor switch including the silicon-controlled rectifier (SCR).

19. The method of claim 16 , wherein the first half-cycle of AC power includes a positive half-cycle of AC power, and wherein the second half-cycle of AC power includes a negative half-cycle of AC power.

20. The method of claim 16 , including:

generating an end-of-life (EOL) signal if the anode voltage of the SCR is less than the threshold voltage.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2014
From: ARMSTRONG, BRUCE
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 033121/0894 →
Continuity (3)
Continuation 13411550 · Mar 3, 2012
Provisional Application 61449489 · Mar 4, 2011
Related Publication 20140293490A1 · Oct 2, 2014