IP Library › Granted Patent US 9,521,742
Granted Patent B2
US 9,521,742 · App. 14/308,773 · Granted Dec 13, 2016

Mounting block and a mounting assembly that incorporates the mounting block

Inventors: Andrew C. Engel (Portola Valley, CA); Michael J. Brosnan (Fremont, CA); David J. K. Meadowcroft (San Jose, CA); Klaus D. Giessler (Menlo Park, CA); Paul Yu (Sunnyvale, CA)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
H05K1/0216H01L23/3675H01L23/3736H01L23/49805H01L23/49838H01L25/0655H05K1/111H05K1/181H01L2224/48091H01L2224/48465H01L2224/48471H01L2224/73265
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Quick Facts
Patent No.
US 9,521,742
App. No.
14/308,773
Granted
Dec 13, 2016
Kind
B2
Abstract

A mounting block is provided that has a multi-level upper surface that is used to mount one or more IC chips and the printed circuit board (PCB) thereon at heights that allow the lengths of the bond wires interconnecting the chips with the PCB and/or with the other IC chips to be reduced. The distances between the levels of the multi-level surface are preselected based at least in part on the known height of the PCB and the known height of at least one of the IC chips such that when the chip and the PCB are mounted on the mounting block, the distance between the contact pads of the PCB and the contact pads of the IC chip is very small, thereby allowing the lengths of the bond wires to be kept very short.

Claims (24)

1. A mounting assembly for mounting a circuit board and one or more integrated circuit (IC) chips thereon, the mounting assembly comprising:

a mounting block comprising a bottom surface and a multi-level mounting surface, the multi-level upper surface comprising N mounting surfaces, where N is a positive integer that is greater than or equal to 2, said N mounting surfaces including at least a first-level mounting surface and a second-level mounting surface, the bottom surface being connected to the first-level mounting surface by first side walls of the mounting block, the first-level mounting surface being connected to the second-level mounting surface by second side walls of the mounting block, the first-level mounting surface being a first distance, d 1 , from the bottom surface in a direction generally normal to the first-level mounting surface and to the bottom surface, the second-level mounting surface being a second distance, d 2 , from the first-level mounting surface in a direction generally normal to the first-level mounting surface and to the second-level mounting surface;

at least a first electrical component mounted on the second-level mounting surface; and

a circuit board mounted on the first-level mounting surface, and wherein the first and second distances d 1 and d 2 , respectively, are preselected such that a top surface of the first IC chip is a first preselected distance from a top surface of the circuit board in a direction generally normal to the top surfaces, wherein a bottom surface of the circuit board is in contact with the first-level mounting surface, and wherein the bottom surface of the circuit board is connected to a top surface of the circuit board by side walls of the circuit board, and wherein a cutaway portion of the circuit board forms an opening in the circuit board that is definable by the inside walls of the circuit board, and wherein the inside walls of the circuit board surround the second side walls that connect the first-level mountain surface to the second-level mounting surface, and wherein electrical contact pads of the circuit board are disposed on the top surface of the circuit board adjacent the inside walls of the circuit board, and wherein the electrical contact pads of the first IC chip are disposed on the top surface of the first IC chip about a peripheral portion of the first IC chip that is adjacent the opening formed in the circuit board.

2. The mounting assembly of claim 1 , wherein the opening formed in the circuit board is a U-shaped opening and wherein the inside walls of the circuit board are first, second and third inside walls, and wherein each of the second side walls of the mounting block is adjacent one of the first, second and third inside walls of the circuit board.

3. The mounting assembly of claim 2 , wherein at least portions of the first, second and third inside walls of the U-shaped opening formed in the circuit board are in contact with portions of the second side walls of the mounting block.

4. The mounting assembly of claim 3 , wherein the first, second and third inside walls of the circuit board have a castellation formed therein where portions of the inside walls of the circuit board have been removed to form grooves in the inside walls of the circuit board in directions generally normal to the top and bottom surfaces of the circuit board, the grooves formed in the inside walls being separated by flat portions of the inside walls, and wherein an electrically-conductive adhesive material is disposed in the grooves, and wherein the flat portions of the inside walls and the electrically-conductive adhesive material disposed in the grooves are in contact with the adjacent second side walls of the mounting block, and wherein the mounting block is made of a metallic material or is plated with a metallic material.

5. The mounting assembly of claim 4 , wherein each of the grooves is connected to an electrically-conductive trace of the circuit board and wherein each of the electrically conductive traces is part of an electrical ground return path of the mounting assembly.

6. The mounting assembly of claim 5 , wherein the grooves are lined with a metallic material.

7. The mounting assembly of claim 3 , wherein the first, second and third inside walls of the circuit board are flat and have a metallic material thereon, and wherein an electrically-conductive adhesive material is disposed on the metallic material.

8. The mounting assembly of claim 1 , wherein the bottom surface, the first-level mounting surface and the second-level mounting surface lie in respective X-Y planes of an X, Y, Z Cartesian Coordinate system, and wherein the directions generally normal to the bottom surface, the first-level mounting surface and the second-level mounting surface are the Z direction.

9. The mounting assembly of claim 8 , wherein the direction generally normal to the top surfaces of the first IC chip and the circuit board is the Z direction.

10. The mounting assembly of claim 9 , wherein the top surface of the first IC chip is a third distance, d 3 , from the bottom surface of the mounting block in the Z direction, and wherein the top surface of the circuit board is a fourth distance, d 4 , from the bottom surface of the mounting block in the Z direction, and wherein d 3 is greater than or equal to d 4 .

11. The mounting assembly of claim 9 , wherein the top surface of the first IC chip is a third distance, d 3 , from the bottom surface of the mounting block in the Z direction, and wherein the top surface of the circuit board is a fourth distance, d 4 , from the bottom surface of the mounting block in the Z direction, and wherein d 3 is greater than d 4 .

12. The mounting assembly of claim 1 , wherein the multi-level upper surface further comprises at least a third-level mounting surface, the third-level mounting surface being connected to the second-level mounting surface by third side walls of the mounting block, the third-level mounting surface being a third distance, d 3 , from the bottom surface in a direction generally normal to the third-level mounting surface and to the bottom surface, and wherein the mounting assembly further comprises:

a second IC chip mounted on the third-level mounting surface, and wherein the first, second and third distances d 1 , d 2 and d 3 , respectively, are preselected such that when the circuit board is mounted on the first-level mounting surface, the first IC chip is mounted on the second-level mounting surface and a second IC chip is mounted on the third-level mounting surface, a top surface of the second IC chip is a second preselected distance from the top surface of the first IC chip in a direction generally normal to the top surfaces and such that the top surface of the first IC chip is the preselected first distance from the top surface of the circuit board in the direction generally normal to the top surfaces of the first IC chip and the circuit board.

13. The mounting assembly of claim 12 , wherein d 3 is greater than d 1 and less than d 2 .

14. The mounting assembly of claim 12 , wherein d 3 is greater than d 2 .

15. The mounting assembly of claim 12 , wherein the mounting block is made of a material of high thermal conductivity, and wherein the mounting block acts as a heat spreader and heat dissipation device that spreads and dissipates heat generated by the first and second IC chips.

16. The mounting assembly of claim 1 , wherein the mounting block is made of metal.

17. The mounting assembly of claim 1 , wherein the first, second and third inside walls of the circuit board have a castellation formed therein where portions of the inside walls of the circuit board have been removed to form grooves in the inside walls of the circuit board in directions generally normal to the top and bottom surfaces of the circuit board, the grooves formed in the inside walls being separated by flat portions of the inside walls, and wherein an electrically-conductive adhesive material is disposed in the grooves, and wherein the flat portions of the inside walls and the electrically-conductive adhesive material disposed in the grooves are in contact with the adjacent second side walls of the mounting block.

18. The mounting assembly of claim 17 , and wherein the mounting block is made of a metallic material or is plated with a metallic material.

19. The mounting assembly of claim 18 , wherein the grooves are lined with a metallic material.

20. The mounting assembly of claim 18 , wherein each of the grooves is connected to an electrically-conductive trace of the circuit board and wherein each of the electrically conductive traces is part of an electrical ground return path of the mounting assembly.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2014
From: ENGEL, ANDREW G; BROSNAN, MICHAEL J; MEADOWCROFT, DAVID J.K.; GIESSLER, KLAUS D; YU, PAUL
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 033137/0451 →
Continuity (1)
Related Publication 20150373834A1 · Dec 24, 2015