IP Library Granted Patent US 9,564,212
Granted Patent B2
US 9,564,212 · App. 14/312,144 · Granted Feb 7, 2017

Solid-state memory corruption mitigation

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Quick Facts
Patent No.
US 9,564,212
App. No.
14/312,144
Granted
Feb 7, 2017
Kind
B2
Abstract

Systems and methods are disclosed for programming data in a non-volatile memory array are disclosed. Certain embodiments provide a non-volatile solid-state memory array and a controller configured to receive write data from a host device, program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode, and perform a data consolidation operation on the first block, wherein said performing garbage collection comprises programming at least a portion of the write data to a second block not in LPO programming mode.

Claims (72)

1. A data storage device comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode; and

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises re-programming the write data to a second block not in LPO programming mode.

2. The data storage device of claim 1 , wherein the controller is further configured to program data from a third block to the second block together with the write data.

3. A data storage device comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode;

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

recover the write data from the first block when a failure condition is encountered while programming the at least a portion of the write data to the second block.

4. The data storage device of claim 1 , wherein the data from the third block was programmed in the third block in LPO programming mode.

5. The data storage device of claim 1 , wherein the data consolidation operation is a garbage collection operation.

6. A data storage device, comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode; and

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises programming at least a portion of the write data to a second block not in LPO programming mode;

wherein a write data-to-parity data ratio of the first block is greater than a write data-to-parity data ratio of the second block.

7. A data storage device comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode;

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

maintain stale count data associated with a plurality of blocks in the solid-state memory array.

8. The data storage device of claim 7 , wherein the controller is further configured to augment a stale count associated with the first block to reflect that the first block is programmed in an LPO mode.

9. The data storage device of claim 8 , wherein the controller is further configured to augment the stale count associated with the first block to indicate that the first block is approximately 50% stale.

10. A data storage device comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode;

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

maintain information associated with a plurality of blocks in the solid-state memory array that indicates a number of times each of the plurality of blocks has been selected for LPO mode.

11. A data storage device comprising:

a non-volatile solid-state memory array; and

a controller configured to:

receive write data from a host device;

program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode;

perform a data consolidation operation on the first block, wherein said performing the data consolidation operation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

enforce a predetermined relaxation time period to prevent the first block from being reselected as an LPO block within the relaxation time period after completion of said data consolidation operation.

12. The data storage device of claim 11 , wherein the relaxation time period is approximately 60 seconds.

13. The data storage device of claim 11 , wherein the relaxation time period is enforced at least in part by setting a ready block list length to a predetermined value.

14. A method of storing data in a data storage system, the method comprising:

receiving write data from a host device;

programming the write data to a first block of a non-volatile solid-state memory array in a lower-page-only (LPO) programming mode; and

performing data consolidation on the first block, wherein said performing data consolidation comprises re-programming the write data to a second block not in LPO programming mode;

wherein the method is performed under the control of a controller of the data storage system.

15. The method of claim 14 , wherein said re-programming the write data to the second block not in LPO programming mode comprises programming the write data to the second block in a multi-level cell (MLC) mode.

16. The method of claim 14 , further comprising recovering the write data from the first block when a failure condition is encountered while programming the write data to the second block.

17. A method of storing data in a data storage system, the method comprising:

receiving write data from a host device;

programming the write data to a first block of a non-volatile solid-state memory array in a lower-page-only (LPO) programming mode; and

performing data consolidation on the first block, wherein said performing data consolidation comprises programming at least a portion of the write data to a second block not in LPO programming mode;

wherein a write-data-to-parity-data ratio of the first block is greater than a write data-to-parity data ratio of the second block.

18. A method of storing data in a data storage system, the method comprising:

receiving write data from a host device;

programming the write data to a first block of a non-volatile solid-state memory array in a lower-page-only (LPO) programming mode;

performing data consolidation on the first block, wherein said performing data consolidation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

maintaining stale count data associated with a plurality of blocks in the solid-state memory array.

19. The method of claim 18 , further comprising augmenting a stale count associated with the first block to reflect that the first block is programmed in an LPO mode.

20. A method of storing data in a data storage system, the method comprising:

receiving write data from a host device;

programming the write data to a first block of a non-volatile solid-state memory array in a lower-page-only (LPO) programming mode;

performing data consolidation on the first block, wherein said performing data consolidation comprises programming at least a portion of the write data to a second block not in LPO programming mode; and

enforcing a predetermined relaxation time period to prevent the first block from being reselected as an LPO block within the relaxation time period after completion of said data consolidation.

21. The method of claim 20 , wherein the relaxation time period is enforced at least in part by setting a ready block list length to a predetermined value.

Assignments (11)
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: SEEKINS, DAVID S.; ROLLAND, DENNIS M.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 035329/0083 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: SEEKINS, DAVID S.; ROLLAND, DENNIS M.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 035332/0944 →