System and method for maintaining a constant output voltage ripple in a buck converter in discontinuous conduction mode

1. A method for varying the on-time of a pulse width modulator (PWM) signal driving a buck converter when the buck converter is operating in discontinuous conduction mode, comprising:

measuring a switching frequency of the buck converter while it is operating in the discontinuous conduction mode and generating a Fs′ value based on the measurement;

receiving a Fs value that is based on the switching frequency of the buck converter when it is operating in continuous conduction mode and the on-time of the PWM signal is constant;

generating an output signal that has a value that is substantially equal to the ratio of the Fs′ value and the Fs value;

causing the on-time of said PWM signal to vary using the output signal; and

causing said output signal to vary said Fs value so as to create a control loop that regulates said output signal.

2. The method of claim 1 , wherein the PWM signal is caused to go on when a feedback signal that is a function of the output voltage of said buck converter drops below a reference signal, and wherein said output signal is modified by a gain stage and an offset stage, said modified output signal causing the PWM signal to go off after a duration of time that is a function of the ratio of the Fs′ value and the Fs value.

3. The method of claim 2 , wherein the on and off state of said PWM signal is controlled by a set-reset flip-flop which is caused to set when said feedback signal drops below said reference signal, and which is caused to reset as a function of the ratio of the Fs′ value and the Fs value.

4. The method of claim 2 , wherein said Fs′ value is a voltage across a first capacitor, said Fs′ value generating step comprising causing said first capacitor to discharge on the detection of the rising edge of each PWM signal; and causing the charge in said first capacitor to rise as a function of a current source coupled to said first capacitor; and wherein said Fs value is a constant voltage whose value is a function of the switching frequency of the buck converter when it is operating in continuous conduction mode; said step of causing said output signal to vary said Fs value comprising causing said current source to vary the charging time of said first capacitor as a function of said output signal.

5. The method of claim 1 , further comprising low-pass filtering the generated Fs′ value using a low pass filter the includes a capacitor having a voltage across it that is a function of the average voltage of said Fs′ value, said method further comprising resetting said low-pass filter capacitor when the voltage across said capacitor exceeds a predetermined threshold.

6. The method of claim 1 , wherein the PWM signal is caused to go on when a feedback signal that is a function of the output voltage of said buck converter drops below a reference signal, and wherein said output signal is modified by a gain stage and a second control loop, said second control loop comprising an offset stage, a multiplier and a low-pass filter; said modified output signal causing the PWM signal to go off after an amount of time that is a function of the ratio of the Fs′ value and the Fs value.

7. The method of claim 1 , further comprising varying the on-time of an oscillator signal as a function of said output signal, the oscillator signal causing the on-time of said PWM signal to vary.

8. A system for varying the on-time of pulse width modulator (PWM) signal driving a buck converter when said buck converter is operating in a discontinuous conduction mode, comprising:

a measurement circuit for measuring a switching frequency of the buck converter while it is operating in the discontinuous conduction mode and generating a Fs′ value based on the measurement;

an input for receiving a Fs value that is based on the switching frequency of the buck converter when it is operating in continuous conduction mode;

a comparator for generating an output signal that is a function of the ratio of the Fs′ value and the Fs value, wherein the output signal is used to cause the on-time of the PWM signal to vary; and

a feedback loop for regulating the output signal to.

9. The system of claim 8 , further comprising an input comparator, a one-shot for generating said PWM signal and an on-time control block, said input comparator causing said one-shot to go on when said input comparator detects when the output voltage of said buck converter drops below a reference signal; and said on-time control block generating a modified output signal for causing said one-shot to reset as a function of the ratio of the Fs′ value and the Fs value, and as a function of a gain stage and an offset stage, thereby causing the on-time of the PWM signal to vary.

10. The system of claim 9 , wherein said one-shot comprises:

a set-reset flip-flop;

a switch;

a capacitor;

a current source; and

a second comparator,

and wherein said set-reset flip-flop is caused to change to a set state each time said input comparator detects when the output voltage of said buck converter drops below a reference signal, and wherein, when said flip-flop is in its set state, said switch is caused to open and enable a ramp voltage to be generated across said capacitor as a function of said current source, said comparator comparing said ramp voltage to said modified output signal, the output of said comparator resetting said flip-flop when the ramp voltage exceeds the modified output signal.

11. The system of claim 9 , wherein said on-time control block includes an input and an output, said on-time control block further comprising a multiplier having two inputs and one output and a low-pass filter, the two inputs of said multiplier connected in common to the output of said on-time control block via said low pass filter, the output of said multiplier connected on the input side of said offset stage to create a control loop.

12. The system of claim 8 wherein said measurement circuit comprises:

a first capacitor;

a switch connected across said first capacitor; and

a current source, and wherein said first capacitor is caused to discharge on the rising edge of each PWM signal, and wherein said current source causes a ramp voltage to be generated across said first capacitor, the output current of said current source also being a function of said output signal.

13. The system of claim 8 , further comprising a low pass filter that includes a capacitor having a voltage across it that is a function of the average of said Fs′ value, said system further comprising a reset circuit for resetting said low-pass filter capacitor when the voltage across said capacitor exceeds a predetermined threshold.

14. The system of claim 8 , further comprising an oscillator for varying the on-time of said PWM signal as a function of said output signal.