Integrated circuit packaging system with substrate and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a prepared carrier having a conductive carrier coating;

depositing a first trace layer on the conductive carrier coating;

forming a first via layer on the first trace layer, the first via layer having vertical sidewalk;

forming an encapsulation on the first trace layer and the first via layer;

planarizing the encapsulation for exposing a top surface of the first trace layer;

forming a second trace layer over the first trace layer and on the encapsulation, the second trace layer connected to the first trace layer;

removing the prepared carrier while leaving the conductive carrier coating on the first trace layer;

removing all of the conductive carrier coating, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of the conductive carrier coating;

applying a protective layer on the first trace layer and the second trace layer; and

connecting an integrated circuit die to the first trace layer.

2. The method as claimed in claim 1 further comprising:

depositing a first dry film layer on the conductive carrier coating; and

patterning the first dry film layer for forming openings exposing portions of the conductive carrier coating.

3. The method as claimed in claim 1 further comprising applying the protective layer on the encapsulation.

4. The method as claimed in claim 1 further comprising:

depositing a first dry film layer on the conductive carrier coating;

patterning the first dry film layer for forming openings exposing portions of the conductive carrier coating;

depositing the first trace layer on the conductive carrier coating and in the openings of the first dry film layer;

depositing a second dry film layer on the first trace layer and the first dry film layer;

patterning the second dry film layer for forming openings exposing portions of the first trace layer;

depositing the first via layer on the first trace layer and in the openings of the second dry film layer; and

removing the first dry film layer and the second dry film layer in the same removal process.

5. The method as claimed in claim 1 wherein providing the prepared carrier includes providing a two-layer carrier.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a prepared carrier having a conductive carrier coating;

depositing a first dry film layer on the conductive carrier coating;

patterning the first dry film layer for forming openings exposing portions of the conductive carrier coating;

depositing a first trace layer on the conductive carrier coating in the openings of the first dry film layer;

depositing a second dry film layer on the first trace layer and the first dry film layer;

patterning the second dry film layer for forming openings exposing portions of the first trace layer;

depositing a first via layer on the first trace layer and in the openings of the second dry film layer, the first via layer having vertical sidewalls;

removing the first dry film layer and the second dry film layer in the same removal process;

forming an encapsulation on the first trace layer and the first via layer;

planarizing the encapsulation for exposing a top surface of the first via layer;

forming a second trace layer over the first trace layer, on the encapsulation, and on the first via layer, the second trace layer connected to the first trace layer through the first via layer;

removing the prepared carrier while leaving the conductive carrier coating on the first trace layer;

removing all of the conductive carrier coating, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of the conductive carrier coating;

applying a protective layer on the first trace layer, the second trace layer, and the encapsulation; and

connecting an integrated circuit die to the first trace layer.

7. The method as claimed in claim 6 further comprising applying a surface finish to the first trace layer.

8. The method as claimed in claim 6 further comprising:

depositing a conductive seed layer on the first via layer and the encapsulation;

depositing a third dry film layer on the conductive seed layer;

forming the second trace layer on the conductive seed layer and in openings of the third dry film layer;

removing the third dry film layer; and

removing the conductive seed layer from between the second trace layer, the second trace layer and the encapsulation having a rough surface characteristic of removal of the third dry film layer and the conductive seed layer.

9. The method as claimed in claim 6 further comprising forming a third trace layer over the second trace layer.

10. The method as claimed in claim 6 further comprising forming a package body on the integrated circuit die.

11. An integrated circuit packaging system comprising:

a substrate including:

a first trace layer,

a first via layer on the first trace layer, the first via layer having vertical sidewalls,

an encapsulation on the first trace layer and the first via layer, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of a conductive carrier coating,

a second trace layer on the encapsulation and over the first trace layer, the second trace layer connected to the first trace layer through the first via layer,

a protective layer on the first trace layer and the second trace layer; and

an integrated circuit die attached to the substrate.

12. The system as claimed in claim 11 further comprising external connectors attached to the substrate.

13. The system as claimed in claim 11 wherein the protective layer is on the encapsulation.

14. The system as claimed in claim 11 wherein the first via layer is on and between the first trace layer and the second trace layer.

15. The system as claimed in claim 11 wherein the encapsulation has a surface, coplanar with the surface of the first trace layer having a rough texture, which has a rough texture characteristic of removal of the conductive carrier coating.

16. The system as claimed in claim 11 further comprising:

external connectors attached to the substrate; and

wherein:

the protective layer is on the encapsulation.

17. The system as claimed in claim 16 further comprising a surface finish on the first trace layer.

18. The system as claimed in claim 16 wherein the second trace layer has a rough surface characteristic of removal of a conductive seed layer.

19. The system as claimed in claim 16 further comprising a third trace layer over the second trace layer.

20. The system as claimed in claim 16 further comprising a package body on the integrated circuit die.