IP Library Patent Application 14317538
Patent Application
App. No. 14/317,538

WIRING BOARD

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Quick Facts
Patent No.
US None
App. No.
14/317,538
Abstract

A wiring board includes an insulating layer having a lower layer conductor on a lower surface thereof, a plurality of semiconductor element connection pads arranged in a lattice pattern in a semiconductor element mounting portion 1 a having a quadrangular shape on the insulating layer, a via hole formed in the insulating layer below each of the semiconductor element connection pads, and a via conductor filled in the via hole and formed integrally with each of the semiconductor element connection pads. The wiring board includes a reinforcing via hole formed in the insulating layer in an outer region outside an arrangement region of the semiconductor element connection pads in corner portions of the semiconductor element mounting portion, and a reinforcing via conductor formed in the reinforcing via hole.

Claims (30)

1 . A wiring board comprising:

an insulating board;

an insulating layer including a lower layer conductor on a lower surface thereof and provided on a surface of the insulating board;

a plurality of semiconductor element connection pads arranged in a lattice pattern in a semiconductor element mounting portion having a quadrangular shape on the insulating layer;

a via hole formed in the insulating layer below each of the semiconductor element connection pads with the lower layer conductor as a bottom surface; and

a via conductor filled in the via hole in a manner to be connected to the lower layer conductor, and formed integrally with each of the semiconductor element connection pads,

wherein the wiring board includes:

a reinforcing via hole formed in the insulating layer in an outer region outside an arrangement region of the semiconductor element connection pads at least in corner portions of the semiconductor element mounting portion with the lower layer conductor as a bottom surface; and

a reinforcing via conductor formed in the reinforcing via hole in a manner to be connected to the lower layer conductor.

2 . The wiring board according to claim 1 ,

the outer region in which the reinforcing via hole is formed is inside the semiconductor element mounting portion.

3 . The wiring board according to claim 1 ,

wherein the reinforcing via conductor has a diameter larger than a diameter of the via conductor.

4 . The wiring board according to claim 1 ,

a center-to-center distance between the via conductor and the reinforcing via conductor located closes to the via conductor is 140 μm or smaller.

5 . A wiring board comprising:

an insulating board;

a first insulating layer including a first lower layer conductor on a lower surface thereof and provided on a surface of the insulating board;

a plurality of semiconductor element connection pads arranged in a lattice pattern in a semiconductor element mounting portion having a quadrangular shape on the first insulating layer;

a via hole formed in the first insulating layer below each of the semiconductor element connection pads with the first lower layer conductor as a bottom surface;

a via conductor filled in the via hole in a manner to be connected to the first lower layer conductor, and formed integrally with each of the semiconductor element connection pads; and

a second insulating layer interposed between the insulating board and the first insulating layer and including a second lower layer conductor on a lower surface thereof,

wherein the wiring board includes:

a first reinforcing via hole formed in the first insulating layer in an outer region outside an arrangement region of the semiconductor element connection pads at least in corner portions of the semiconductor element mounting portion;

a first reinforcing via conductor filled in each of the first reinforcing via holes;

a second reinforcing via hole formed with the second lower layer conductor as a bottom surface in the second insulating layer immediately below the first reinforcing via hole; and

a second reinforcing via conductor filled in the second reinforcing via hole.

6 . The wiring board according to claim 5 ,

wherein the first and second reinforcing via holes are formed as an integrated via hole that penetrates the first and second insulating layers, and

the first and second reinforcing via conductors are formed as an integrated via conductor in the integrated via hole.

Assignments (3)
CHANGE OF NAME Recorded May 25, 2016
From: KYOCERA CIRCUIT SOLUTIONS, INC.
To: KYOCERA CORPORATION
Reel/Frame 038806/0631 →
CHANGE OF NAME Recorded Aug 13, 2015
From: KYOCERA SLC TECHNOLOGIES CORPORATION
To: KYOCERA CIRCUIT SOLUTIONS, INC.
Reel/Frame 036344/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2014
From: IINO, MASAKAZU; FUJISAKI, TERUYA; OYOSHI, TAKAFUMI
To: KYOCERA SLC TECHNOLOGIES CORPORATION
Reel/Frame 033198/0098 →