Startup clamp circuit for non-complimentary differential pair in DCDC converter system
A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.
1. A DCDC converter operable to receive an input DC voltage and to generate an output DC voltage based on the received input DC voltage, said DCDC converter comprising:
a transconductance amplifier operable to output a transconductance current and a switch control signal, the transconductance current being based on a comparison of a portion of the output DC voltage and a predetermined reference voltage;
a comparator having a first n-channel field effect transistor input and a second n-channel field effect transistor input, said first n-channel field effect transistor input and said second n-channel field effect transistor input forming a differential pair, said comparator being operable to output a compared signal based on a first input voltage received at said first n-channel field effect transistor input and a second input voltage received at said second n-channel field effect transistor input;
a current driving component operable to generate an output current based on the compared signal;
an output impedance component arranged to generate the output DC voltage based on the output current;
a switch arranged between said first n-channel field effect transistor input and said second n-channel field effect transistor input, said switch being operable to open and close based on the switch control signal; and
a clamp resistor arranged in series with said switch and arranged between said first n-channel field effect transistor input and said second n-channel field effect transistor input; and
a p-channel field effect transistor arranged in series with said clamp resistor and arranged between said first n-channel field effect transistor input and said second n-channel field effect transistor input, said p-channel field effect transistor being controlled by the output DC voltage.
2. The DCDC converter of claim 1 , further comprising an attenuation component operable to attenuate the output DC voltage to generate the portion of the output DC voltage.
3. The DCDC converter of claim 2 , wherein said attenuation component comprises a first resistor and a second resistor arranged as a voltage divider.
4. The DC/DC converter of claim 3 , wherein said p-channel field effect transistor comprises a gate and a back gate.
5. The DC/DC converter of claim 4 ,
wherein said gate is connected to ground, and
wherein said back gate is connected the output DC voltage.
6. The DC/DC converter of claim 2 , wherein said p-channel field effect transistor comprises a gate and a back gate.
7. The DC/DC converter of claim 6 ,
wherein said gate is connected to ground, and
wherein said back gate is connected the output DC voltage.
8. The DCDC converter of claim 1 , further comprising:
a controller operable to generate an attenuation control signal,
wherein said attenuation component comprises a controllable attenuation component operable to attenuate the output DC voltage to generate the portion of the output DC voltage based on the attenuation control signal.
9. The DCDC converter of claim 8 , further comprising:
a reference voltage generating component operable to provide the reference voltage,
wherein said controller is further operable to generate a reference control signal, and
wherein said reference voltage generating component is operable to provide the reference voltage based on the reference control signal.
10. The DC/DC converter of claim 9 , wherein said p-channel field effect transistor comprises a gate and a back gate.
11. The DC/DC converter of claim 10 ,
wherein said gate is connected to ground, and
wherein said back gate is connected the output DC voltage.
12. The DC/DC converter of claim 8 , wherein said p-channel field effect transistor comprises a gate and a back gate.
13. The DC/DC converter of claim 12 ,
wherein said gate is connected to ground, and
wherein said back gate is connected the output DC voltage.
14. The DCDC converter of claim 1 , further comprising:
a second comparator having a second first n-channel field effect transistor input and a second second n-channel field effect transistor input, said second first n-channel field effect transistor input and said second second n-channel field effect transistor input forming a differential pair, said second comparator being operable to output a second compared signal based on a second first input voltage received at said second first n-channel field effect transistor input and a second second input voltage received at said second second n-channel field effect transistor input;
a second clamp resistor arranged between said second first n-channel field effect transistor input and said second second n-channel field effect transistor input;
a second switch arranged between said second first n-channel field effect transistor input and said second second n-channel field effect transistor input, said second switch being operable to open and close based on the switch control signal;
a second p-channel field effect transistor arranged between said second first n-channel field effect transistor input and said second second n-channel field effect transistor input, said second p-channel field effect transistor being controlled by the output DC voltage.
15. The DC/DC converter of claim 1 , wherein said p-channel field effect transistor comprises a gate and a back gate.
16. The DC/DC converter of claim 15 ,
wherein said gate is connected to ground, and
wherein said back gate is connected the output DC voltage.
17. A circuit having a transconductance amplifier and a comparator, the comparator having a first input and a second input, the transconductance amplifier providing a current for the second input of the comparator, wherein the improvement comprises:
a p-channel field effect transistor arranged between the first input and the second input,
wherein the first input comprises a first n-channel field effect transistor, wherein the second input comprises a second n-channel field effect transistor,
wherein said first n-channel field effect transistor and said second n-channel field effect transistor form a differential pair;
further comprising a switch operable to be controlled via said transconductance amplifier.
18. The circuit of claim 17 , wherein the improvement further comprises a clamp resistor.
19. The circuit of claim 18 ,
wherein said resistor is disposed between said switch and said p-channel field effect transistor.