IP Library Granted Patent US 9,252,253
Granted Patent B2
US 9,252,253 · App. 14/330,072 · Granted Feb 2, 2016

High electron mobility transistor

Inventor: In-jun Hwang (Hwaseong-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L29/778H01L29/2003H01L29/402H01L29/41725H01L29/42316H01L29/66462H01L29/7787
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Quick Facts
Patent No.
US 9,252,253
App. No.
14/330,072
Granted
Feb 2, 2016
Kind
B2
Abstract

According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer having a 2-dimensional electron gas (2DEG), a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer, at least one channel depletion layer on the channel supply layer; a gate electrode on at least a part of the channel depletion layer, and at least one bridge connecting the channel depletion layer and the source electrode. The channel depletion layer is configured to form a depletion region in the 2DEG. The HEMT has a ratio of a first impedance to a second impedance that is a uniform value. The first impedance is between the gate electrode and the channel depletion layer. The second impedance is between the source electrode and the channel depletion layer.

Claims (53)

1. A high electron mobility transistor (HEMT) comprising:

a channel layer having a 2-dimensional electron gas (2DEG);

a channel supply layer on the channel layer;

a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer;

a channel depletion layer on the channel supply layer, the channel depletion layer configured to form a depletion region in the 2DEG;

a gate electrode on at least a part of the channel depletion layer; and

at least one bridge connecting the channel depletion layer to the source electrode, the HEMT having a ratio of a first impedance to a second impedance being a uniform value, the first impedance being between the gate electrode and the channel depletion layer, the second impedance being between the source electrode and the channel depletion layer.

2. The HEMT of claim 1 , wherein the ratio of the first impedance to the second impedance is in a range from 0.1 to 10.

3. The HEMT of claim 1 , wherein the ratio of the first impedance to the second impedance has the uniform value regardless of an operation frequency of the HEMT.

4. The HEMT of claim 1 , wherein the ratio of the first impedance to the second impedance has the uniform value in an operation frequency of the HEMT in a range from 1 KHz to 1 GHz.

5. The HEMT of claim 1 , wherein

the first impedance includes a first conductance (GG) between the gate electrode and the channel depletion layer, a first capacitance (CG) between the gate electrode and the channel depletion layer, and a first resistance (RG) between the gate electrode and the channel depletion layer, and

the second impedance includes a second conductance (GS) between the source electrode and the channel depletion layer, a second capacitance (CS) between the source electrode and the channel depletion layer, and a second resistance (RS) between the source electrode and the channel depletion layer, and

an equation GS/GG=CS/CG=RG/RS is satisfied.

6. The HEMT of claim 1 , further comprising:

a first contact connecting the gate electrode to the channel depletion layer; and

a second contact, wherein

the second contact and the at least one bridge connect the source electrode to the channel depletion layer.

7. The HEMT of claim 6 , wherein the first and second contacts include a metal.

8. The HEMT of claim 6 , wherein the first and second contacts include one of a semiconductor and an insulator.

9. The HEMT of claim 6 , wherein the channel depletion layer includes:

a first channel depletion layer and a second channel depletion layer spaced apart from each other,

a third channel depletion layer between the first and second channel depletion layers, and

a fourth channel depletion layer protruding from the first channel depletion layer.

10. The HEMT of claim 9 , wherein the first contact protrudes above the third channel depletion layer from the gate electrode.

11. The HEMT of claim 10 , wherein the second contact is on the fourth channel depletion layer.

12. The HEMT of claim 11 , wherein the ratio of the first impedance to the second impedance is determined by a ratio of a contact area between the first contact and the third channel depletion layer to a contact area between the second contact and the fourth channel depletion layer.

13. A high electron mobility transistor (HEMT) comprising:

a channel layer,

a channel supply layer on the channel layer, the channel supply layer configured to form a 2-dimensional electron gas (2DEG) in the channel layer;

a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer;

a channel depletion layer on the channel supply layer between the source and drain electrodes, the channel depletion layer configured to form a depletion region in the 2DEG;

a gate electrode on the channel depletion layer, the gate electrode electrically connected to the channel depletion layer through a first contact area; and

at least one bridge over the channel depletion layer, the at least one bridge connecting the channel depletion layer to the source electrode through a second contact area, the first and second contact areas corresponding to different parts of the channel depletion layer.

14. The HEMT of claim 13 , wherein

a ratio of a first impedance to a second impedance being a uniform value,

the first impedance is between the gate electrode and the channel depletion layer, and

the second impedance is between the source electrode and the channel depletion layer.

15. The HEMT of claim 14 , wherein

the ratio of the first impedance to the second impedance is in a range from 0.1 to 10, and

the ratio of the first impedance to the second impedance has a uniform value in an operation frequency of the HEMT in a range from 1 KHz to 1 GHz.

16. The HEMT of claim 13 , further comprising:

a first contact on the channel depletion layer; and

a second contact on the channel depletion layer, wherein

the first contact and the second contact are spaced apart from each other,

the gate electrode is electrically connected to the channel depletion layer through the first contact, and

the at least one bridge includes one bridge that is electrically connected to the channel depletion layer through the second contact.

17. The HEMT of claim 16 , wherein

the gate electrode is on the first contact, and

the one bridge is on the second contact.

18. An array structure comprising:

a substrate;

a plurality of the HEMT of claim 13 on the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2014
From: HWANG, IN-JUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 033304/0776 →
Priority Claims (1)
KR 10-2013-0124169 · Oct 17, 2013 · national
Continuity (1)
Related Publication 20150108547A1 · Apr 23, 2015