IP Library Granted Patent US 9,105,828
Granted Patent B2
US 9,105,828 · App. 14/334,164 · Granted Aug 11, 2015

Method for manufacturing semiconductor light emitting device

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Quick Facts
Patent No.
US 9,105,828
App. No.
14/334,164
Granted
Aug 11, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor light emitting device includes a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer; a p-side electrode provided on the second surface of the semiconductor layer in a region including the light emitting layer; an n-side electrode provided on the second surface of the semiconductor layer in a region not including the light emitting layer; an insulating film being more flexible than the semiconductor layer, the insulating film provided on the second surface and a side surface of the semiconductor layer, and the insulating film having a first opening reaching the p-side electrode and a second opening reaching the n-side electrode; a p-side interconnection layer provided on the insulating film and connected to the p-side electrode; and an n-side interconnection layer provided on the insulating film and connected to the n-side electrode.

Claims (30)

1. A method for manufacturing a semiconductor light emitting device, comprising:

forming a semiconductor layer including a light emitting layer on a substrate, the semiconductor layer having a first surface on the substrate side and a second surface opposite to the first surface;

forming a separation groove in the semiconductor layer, the separation groove separating the semiconductor layer;

forming a p-side electrode on the semiconductor layer;

forming a n-side electrode on the semiconductor layer;

forming an insulating film so as to form on the semiconductor layer and a bottom surface of the separation groove;

forming a contact portion and an interconnection portion on the second surface side;

removing the substrate from the semiconductor layer after forming the interconnection portion; and

singulating the semiconductor light emitting device by cutting the insulating film at the separation grove after removing the substrate from the semiconductor layer,

the insulating film provided around the contact portion and the interconnection portion.

2. The method according to claim 1 , wherein

the contact portion penetrates the insulating film and reaches the p-side electrode and the n-side electrode, and

the interconnection portion is formed on the first insulating film and is electrically connected to the p-side electrode and the n-side electrode through the contact portion.

3. The method according to claim 1 , wherein

the forming of the insulating film includes forming a first insulating film on the semiconductor layer, and forming a second insulating film on the first insulating film.

4. The method according to claim 3 , wherein the second insulating film includes a resin.

5. The method according to claim 3 , wherein

the second insulating film is formed on the first insulating film on the separation grove, and

the second insulating film and the first insulating film are cut at the separation grove.

6. The method according to claim 3 , wherein the first insulating film includes a resin.

7. The method according to claim 3 , wherein the second insulating film is any of an epoxy resin, a silicone resin and a fluororesin.

8. The method according to claim 3 , wherein the first insulating film includes silicon oxide or silicon nitride.

9. The method according to claim 1 , wherein the semiconductor layer is a nitride semiconductor.

10. The method according to claim 1 , wherein

the semiconductor layer includes a side surface continued from the first surface,

the insulating film forms on the second surface and the side surface of the semiconductor layer.

11. The method according to claim 10 , wherein

a planar shape of the semiconductor layer is formed a quadrangle, and

the insulating film formed on the side surface of the semiconductor layer surrounds the semiconductor layer like a frame.

12. The method according to claim 1 , wherein the interconnection portion includes an interconnection layer and a metal pillar provided on the interconnection layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2018
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 046986/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 046364/0164 →