Interconnect structure for semiconductor devices
A method of manufacturing a semiconductor device with a cap layer for a copper interconnect structure formed in a dielectric layer is provided. In an embodiment, a conductive material is embedded within a dielectric layer, the conductive material comprising a first material and having either a recess, a convex surface, or is planar. The conductive material is silicided to form an alloy layer. The alloy layer comprises the first material and a second material of germanium, arsenic, tungsten, or gallium.
1. A method of manufacturing a semiconductor device, the method comprising:
forming an opening in a substrate, the substrate having a first top surface;
filling the opening with a conductive material; and
introducing silicon to the conductive material to form a silicide alloy layer overlying the conductive material, wherein after the introducing silicon the conductive material comprises a first material and has a second top surface, the second top surface being planar with the first top surface, the silicide alloy layer having a third top surface that is planar, the silicide alloy layer comprising the first material and a second material, the second material comprising germanium, arsenic, tungsten, or gallium, wherein the introducing silicon to the conductive material further comprises:
introducing a first precursor to the conductive material, the first precursor being a silicon containing precursor; and
introducing a second precursor to the conductive material.
2. The method of claim 1 , further comprising forming a barrier layer between the conductive material and the substrate.
3. The method of claim 1 , wherein the introducing the first precursor begins prior to the introducing the second precursor.
4. The method of claim 1 , wherein the introducing the first precursor and the introducing the second precursor begin simultaneously.
5. The method of claim 1 , wherein the introducing the first precursor begins after the introducing the second precursor.
6. The method of claim 1 , wherein the conductive material is copper.
7. A method of manufacturing a semiconductor device, the method comprising:
removing a portion of a dielectric layer to form an opening;
placing a conductive material into the opening, the conductive material having a convex surface that extends beyond a top surface of the dielectric layer, the conductive material comprising a first material; and
introducing a first precursor and introducing a second precursor to silicide a portion of the conductive material to form an alloy layer conformally to the convex surface, the alloy layer comprising the first material and a second material, the second material comprising germanium, arsenic, tungsten, or gallium, wherein the first precursor is a silicon containing precursor material and the second precursor contains the second material.
8. The method of claim 7 , wherein the introducing the first precursor occurs prior to the introducing the second precursor.
9. The method of claim 7 , wherein the introducing the first precursor occurs after the introducing the second precursor.
10. The method of claim 7 , wherein the introducing the first precursor occurs simultaneously with the introducing the second precursor.
11. The method of claim 7 , wherein the first material is copper.
12. The method of claim 7 , further comprising forming a barrier layer between the conductive material and the dielectric layer.
13. The method of claim 12 , wherein the alloy layer extends over the barrier layer.
14. A method of manufacturing a semiconductor device, the method comprising:
embedding a conductive material into an opening within a dielectric material, the conductive material comprising a first material; and
siliciding the conductive material to form an alloy layer over the conductive material, the alloy layer being planar and comprising the first material and a second material, the second material comprising germanium, arsenic, tungsten, or gallium, wherein the siliciding the conductive material further comprises:
introducing a first precursor material to the conductive material, the first precursor material being a silicon containing precursor material; and
introducing a second precursor material to the conductive material, the second precursor material containing the second material.
15. The method of claim 14 , wherein the siliciding the conductive material further comprises forming a seed layer of silicon on the conductive material.
16. The method of claim 14 , wherein the introducing the first precursor material and the introducing the second precursor material are begun simultaneously.
17. The method of claim 14 , wherein the introducing the first precursor material is begun after the introducing the second precursor material.
18. The method of claim 14 , wherein the conductive material comprises copper.
19. The method of claim 14 , further comprising forming a barrier layer between the conductive material and the dielectric material.
20. The method of claim 14 , wherein after the siliciding the conductive material the conductive material has a planar top surface with the dielectric material.