IP Library Patent Application 14341004
Patent Application
App. No. 14/341,004

METHOD OF MANUFACTURING WIRING BOARD

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
14/341,004
Abstract

A manufacturing method includes a step of forming a first plating mask on a base metal layer, a step of forming a main conductor layer on the base metal layer exposed from the first plating mask, a step of forming a second plating mask on them, a step of attaching a metal plating layer to an upper surface of the main conductor layer exposed from the second plating mask, a step of removing the first and second plating masks, a step of etching away a portion of the base metal layer to which the main conductor layer is not attached, and a step of forming a solder resist layer.

Claims (14)

1 . A method of manufacturing a wiring board comprising:

a step of attaching a base metal layer serving as a wiring conductor to an upper surface of an insulating board;

a step of forming a first plating mask on the base metal layer to expose the base metal layer into a shape corresponding to the wiring conductor;

a step of attaching a main conductor layer serving as the wiring conductor by electrolytic plating, on the base metal layer exposed from the first plating mask;

a step of forming a second plating mask on the first plating mask and the main conductor layer, to expose an upper surface of the main conductor layer having a portion corresponding to a semiconductor element connection pad; a step of attaching a metal plating layer by electrolytic plating to the upper surface of the main conductor layer exposed from the first and second plating masks;

a step of removing the first and second plating masks;

a step of etching away a portion of the base metal layer to which the main conductor layer is not attached, and forming the wiring conductor comprising the base metal layer and the main conductor layer, and having the metal plating layer attached to the upper surface of the semiconductor element connection pad; and

a step of forming a solder resist layer having an opening to expose the semiconductor element connection pad, on the insulating board and the wiring conductor.

2 . The method of manufacturing the wiring board according to claim 1 , wherein

the metal plating layer comprises a nickel plating layer and a gold plating layer formed on the nickel plating layer.

3 . The method of manufacturing the wiring board according to claim 1 , wherein

the metal plating layer is attached by electrolytic plating all over the upper surface of the main conductor layer exposed from the first and second plating masks.

4 . The method of manufacturing the wiring board according to claim 1 , wherein

the metal plating layer is attached by electrolytic plating to the semiconductor element connection pad and a neighborhood of the semiconductor element connection pad on the upper surface of the main conductor layer exposed from the first and second plating masks.

Assignments (3)
CHANGE OF NAME Recorded Aug 13, 2015
From: KYOCERA SLC TECHNOLOGIES CORPORATION
To: KYOCERA CIRCUIT SOLUTIONS, INC.
Reel/Frame 036344/0749 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY DATA PREVIOUSLY RECORDED ON REEL 033394 FRAME 0623. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNOR'S INTEREST. Recorded Jul 30, 2014
From: OHSUMI, KOHICHI; NOGUCHI, SUMIKO
To: KYOCERA SLC TECHNOLOGIES CORPORATION
Reel/Frame 033447/0884 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2014
From: OHSUMI, KOHICHI; NOGUCHI, SUMIKO
To: KYOCERA CORPORATION
Reel/Frame 033394/0623 →