IP Library › Granted Patent US 9,324,735
Granted Patent B2
US 9,324,735 · App. 14/348,434 · Granted Apr 26, 2016

Array substrate and manufacturing method thereof, display panel and display device

Inventors: Jun Cheng (Beijing, CN); Haijing Chen (Beijing, CN); Chunsheng Jiang (Beijing, CN)
Assignee: BOE Technology Group Co., Ltd.
H01L27/1225H01L21/467H01L27/124H01L27/1259H01L29/42384H01L29/45H01L29/7869H01L29/66969
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Quick Facts
Patent No.
US 9,324,735
App. No.
14/348,434
Granted
Apr 26, 2016
Kind
B2
Abstract

The present invention provides an array substrate and a manufacturing method thereof, a display panel and a display device. The array substrate includes a plurality of pixel units, each of which includes: a TFT area provided with a TFT including a gate, a gate insulation layer, an active area, a source and a drain; and a display area provided with a pixel electrode.

Claims (37)

1. A manufacturing method of an array substrate, the array substrate including a plurality of pixel units, each of which includes: a thin film transistor (TFT) area provided with a thin film transistor including a gate, a gate insulation layer, a source, a drain and an active area; and a display area provided with a pixel electrode, wherein the manufacturing method of an array substrate includes steps of:

forming a pattern including the gate on a substrate through a patterning process, and forming the gate insulation layer;

forming patterns including the active area and an etching stop area provided on the active area through a patterning process, on the substrate subjected to the above step;

forming a transparent conductive layer film, and forming patterns including the source and the drain from the transparent conductive layer film through a patterning process; and

forming a pattern including the pixel electrode from the transparent conductive layer film through a patterning process,

wherein the step of forming a transparent conductive layer film and forming patterns including the source and the drain from the transparent conductive layer film through a patterning process includes steps of:

sequentially forming the transparent conductive layer film, a transition layer film and a metal layer film; and

removing respective portions of the metal layer film, the transition layer film and the transparent conductive layer film corresponding to the active area and removing respective portions of the metal layer film, the transition layer film, the transparent conductive layer film and the active layer film between individual pixel units through a patterning process, so as to form patterns including a source connection layer, a source transition layer, the source and the drain,

wherein, the source transition layer is used to electrically connect the source connection layer with the source,

wherein the step of forming a pattern including the pixel electrode from the transparent conductive layer film through a patterning process includes steps of:

forming a passivation layer, and applying a photoresist layer on the passivation layer;

exposing and developing the photoresist layer, wherein no photoresist layer is left in the display area;

removing a portion of the passivation layer which is not covered by the photoresist layer in the display area through dry etching;

removing a portion of the metal layer film which is not covered by the photoresist layer in the display area through wet etching;

removing a portion of the transition layer film which is not covered by the photoresist layer in the display area through dry etching, so as to expose the transparent conductive layer film to form the pixel electrode; and

removing the remaining photoresist layer.

2. A manufacturing method of an array substrate, the array substrate including a plurality of pixel units, each of which includes: a thin film transistor (TFT) area provided with a thin film transistor including a gate, a gate insulation layer, a source, a drain and an active area; and a display area provided with a pixel electrode, wherein the manufacturing method of an array substrate includes steps of:

forming a pattern including the gate on a substrate through a patterning process, and forming the gate insulation layer;

forming patterns including the active area and an etching stop area provided on the active area through a patterning process, on the substrate subjected to the above step;

forming a transparent conductive layer film, and forming patterns including the source and the drain from the transparent conductive layer film through a patterning process; and

forming a pattern including the pixel electrode from the transparent conductive layer film through a patterning process,

wherein the step of forming patterns including the active area and an etching stop area provided on the active area through a patterning process includes steps of:

sequentially forming an active layer film and an etching stop layer film, and applying a photoresist layer on the etching stop layer film, wherein, a portion of the active layer film corresponding to the gate constitutes the active area;

exposing and developing the photoresist layer to maintain a portion of the photoresist layer on the etching stop area;

removing a portion of the etching stop layer film which is not covered by the photoresist layer to form a pattern of the etching stop area; and

removing the remaining photoresist layer,

wherein the step of forming a transparent conductive layer film and forming patterns including the source and the drain from the transparent conductive layer film through a patterning process includes steps of:

sequentially forming the transparent conductive layer film, a transition layer film and a metal layer film; and

removing respective portions of the metal layer film, the transition layer film and the transparent conductive layer film corresponding to the active area and removing respective portions of the metal layer film, the transition layer film, the transparent conductive layer film and the active layer film between individual pixel units through a patterning process, so as to form patterns including a source connection layer, a source transition layer, the source and the drain,

wherein, the source transition layer is used to electrically connect the source connection layer with the source, and

wherein the step of forming a pattern including the pixel electrode from the transparent conductive layer film through a patterning process includes steps of:

forming a passivation layer, and applying a photoresist layer on the passivation layer;

exposing and developing the photoresist layer, wherein no photoresist layer is left in the display area;

removing a portion of the passivation layer which is not covered by the photoresist layer in the display area through dry etching;

removing a portion of the metal layer film which is not covered by the photoresist layer in the display area through wet etching;

removing a portion of the transition layer film which is not covered by the photoresist layer in the display area through dry etching, so as to expose the transparent conductive layer film to form the pixel electrode; and

removing the remaining photoresist layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2014
From: CHENG, JUN; CHEN, HAIJING; JIANG, CHUNSHENG
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 032562/0019 →
Priority Claims (1)
CN 2013 1 0269161 · Jun 28, 2013 · national
Continuity (1)
Related Publication 20150318311A1 · Nov 5, 2015