REFERENCE VOLTAGE GENERATING CIRCUIT, INTEGRATED CIRCUIT AND VOLTAGE OR CURRENT SENSING DEVICE
A reference voltage generating circuit comprising a first bandgap voltage source arranged to output a first bandgap voltage exhibiting a first type deviation in response to a strain applied at die level in a given direction; a second bandgap voltage source arranged to output a second bandgap voltage exhibiting a second type deviation in response to a strain applied at die level in the given direction, said second type deviation being opposite to the first type deviation of the first bandgap voltage; and an adding circuit arranged to add the first bandgap voltage and the second bandgap voltage, and to output a temperature drift and strain drift compensated reference voltage.
1 . A reference voltage generating circuit comprising:
a first bandgap voltage source arranged to output a first bandgap voltage exhibiting a first type deviation in response to a strain applied at die level in a given direction,
a second bandgap voltage source arranged to output a second bandgap voltage and exhibiting a second type deviation in response to a strain applied at die level in the given direction, said second type deviation being opposite to the first type deviation of the first bandgap voltage, and
an adding circuit arranged to add the first bandgap voltage and the second bandgap voltage, and to output a temperature drift and strain drift compensated reference voltage.
2 . The circuit of claim 1 , wherein:
the first bandgap voltage source comprises a first P-N junction having a first forward voltage drop which exhibits the first type voltage deviation in response to the strain applied in the given direction; and,
the second bandgap voltage source comprises a second P-N junction having second forward voltage drop which exhibits the second type voltage deviation in response to the strain applied in the given direction.
3 . The circuit of claim 2 , wherein the first P-N junction is formed by a diode-connected bipolar transistor or the second P-N junction is formed by a diode-connected bipolar transistor.
4 . The circuit of claim 3 , wherein the first P-N junction is formed by a diode-connected bipolar transistor of a first conduction type and the second P-N junction is formed by a diode-connected bipolar transistor of a second conduction type, different from said first conduction type.
5 . The circuit of claim 4 , wherein the first P-N junction is formed by a diode-connected PNP bipolar transistor and the second P-N junction is formed by a diode-connected NPN bipolar transistor.
6 . The circuit of claim 1 , wherein the first bandgap voltage source or the second bandgap voltage source are arranged to perform a first order and second order temperature drift compensation.
7 . The circuit of claim 1 , wherein the adding circuit is arranged to apply first and second weighting coefficients to the first and second bandgap voltages, respectively.
8 . The circuit of claim 7 , wherein the first weighting coefficient is different from the second weighting coefficient.
9 . The circuit of claim 7 , wherein the adding circuit comprises a first transistor having a control terminal receiving the first bandgap voltage and a second transistor having a control terminal receiving the second bandgap voltage, and wherein the output of the reference voltage circuit is taken on common terminals of said first and second transistors.
10 . The circuit of claim 9 wherein the first and second transistors are sized to obtain desired values of the first and second weighting coefficients.
11 . The circuit of claim 1 , wherein the first bandgap voltage source or the second bandgap voltage source each comprises:
first and second current mirrored branches, comprising a first transistor and a second transistor mirrored with said first transistor, respectively, said first and second transistor being arranged as current sources controlled by one and the same control signal; and,
an operational amplifier, arranged to provide the control signal for the currents sources, wherein
the first current mirrored branch further comprises a first diode arranged between the first transistor and the ground, and the second current mirrored branch further comprises a second diode in series with an associated resistor arranged between the second transistor and the ground,
a first node between the first transistor and the first diode is connected to the ground via a first resistor, and a second node between the second transistor on one side and the second diode and associated resistor on the other side, is connected to the ground via a second resistor, and
the operational amplifier is arranged to output the control signal as a function of the difference between voltage at the first node and the voltage at the second node.
12 . The circuit of claim 11 , wherein the first or second transistors each comprises a Field Effect Transistor.
13 . The circuit of claim 11 , wherein the first diode or the second diode each comprises a diode-connected transistor.
14 . The circuit of claim 11 , wherein the first and second resistors are variable resistors.
15 . The circuit of claim 14 wherein the value of the first and second resistors is controlled to obtain desired values of the first and second weighting coefficients.
16 . The circuit of claim 11 , wherein the first and second resistors have the same resistance value.
17 . The circuit of claim 11 , wherein the first resistor and/or the second resistor each comprises a MOS transistor controlled in the conduction zone of operation.
18 - 20 . (canceled)