Solid-state imaging device and manufacturing method of the same, and electronic apparatus
The present disclosure relates to a solid-state imaging device and a manufacturing method of the same, and an electronic apparatus, capable of more reliably suppressing occurrence of color mixing. A trench is formed between PDs so as to be opened to a light receiving surface side of a semiconductor substrate on which a plurality of the PDs, each of which receives light to generate charges, are formed, an insulating film is embedded in the trench and the insulating film is laminated on a back surface side of the semiconductor substrate. Then, a light shielding portion is formed so as to be laminated on the insulating film and to have a convex shape protruding to the semiconductor substrate at a location corresponding to the trench. The present technology can be applied to a back surface irradiation type CMOS solid-state imaging device.
1. A solid-state imaging device comprising:
a semiconductor substrate on which a plurality of photoelectric conversion units, each of which receives light to generate charges, are formed;
a recessed portion that is formed between the photoelectric conversion units so as to be opened to a light receiving surface side of the semiconductor substrate;
an insulating film which is embedded in the recessed portion and laminated on the back surface side of the semiconductor substrate; and
a light shielding portion that is laminated on the insulating film and is formed into a convex shape protruding to the semiconductor substrate at a location corresponding to the recessed portion.
2. The solid-state imaging device according to claim 1 ,
wherein the light shielding portion is formed into a length sufficient to prevent a leading end on the semiconductor substrate side from entering the recessed portion.
3. The solid-state imaging device according to claim 1 ,
wherein when the insulating film is formed, a concave portion in which a surface of the insulating film is concave is formed, depending on a location of the recessed portion.
4. The solid-state imaging device according to claim 1 ,
wherein the insulating film is configured as a laminated structure in which a plurality of layers are laminated.
5. The solid-state imaging device according to claim 1 ,
wherein with respect to the light receiving surface of the semiconductor substrate in which the recessed portion is formed, after a fixed charge film having negative fixed charges is formed, the insulating film is formed.
6. The solid-state imaging device according to claim 1 ,
wherein light is applied to a back surface which is a side opposite to a front surface on which a wiring layer is laminated on the semiconductor substrate.
7. A manufacturing method of a solid-state imaging device comprising the steps of:
forming a recessed portion between photoelectric conversion units so as to be opened to a light receiving surface side of a semiconductor substrate on which a plurality of the photoelectric conversion units, each of which receives light to generate charges, are formed;
embedding an insulating film in the recessed portion and laminating the insulating film on a back surface side of the semiconductor substrate; and
laminating a light shielding portion on the insulating film and forming the light shielding portion into a convex shape protruding to the semiconductor substrate at a location corresponding to the recessed portion.
8. An electronic apparatus comprising:
a solid-state imaging device including
a semiconductor substrate on which a plurality of photoelectric conversion units, each of which receives light to generate charges, are formed;
a recessed portion that is formed between the photoelectric conversion units so as to be opened to a light receiving surface side of the semiconductor substrate;
an insulating film which is embedded in the recessed portion and laminated on the back surface side of the semiconductor substrate; and
a light shielding portion that is laminated on the insulating film and is formed into a convex shape protruding to the semiconductor substrate at a location corresponding to the recessed portion.