IP Library Granted Patent US 10,197,783
Granted Patent B2
US 10,197,783 · App. 14/377,382 · Granted Feb 5, 2019

Image-forming device, and dimension measurement device

Inventors: Yasunori Takasugi (Tokyo, JP); Kei Sakai (Tokyo, JP); Satoru Yamaguchi (Tokyo, JP); Kazuyuki Hirao (Tokyo, JP)
Assignee: Hitachi High-Technologies Corporation
G02B21/367G01B15/00G01B15/04G02B21/002G06K9/6202G06T7/32H01J37/28H01J37/3178G06T2207/10061H01J2237/2814H01J2237/2817
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Quick Facts
Patent No.
US 10,197,783
App. No.
14/377,382
Granted
Feb 5, 2019
Kind
B2
Abstract

The purpose of the present invention is to provide an image forming device and the like that is capable of forming a proper integrated signal even when an image or a signal waveform is acquired from a pattern having the possibility of preventing proper matching, such as a repetition pattern, a shrinking pattern, and the like. In order to achieve the purpose, there is proposed an image forming device that forms an integrated image by integrating a plurality of image signals and that is provided with: a matching processing section that performs a matching process between the plurality of image signals; an image integration section that integrates the plurality of image signals for which positioning has been performed by the matching processing section; and a periodicity determination section that determines a periodicity of a pattern contained in the image signals. The matching processing section varies a size of an image signal area for the matching in accordance with a determination by the periodicity determination section.

Claims (13)

1. A charged particle beam device comprising a processor that forms an integrated image by integrating a plurality of image signal regions obtained by scanning a semiconductor device with a charged particle beam, wherein

the processor includes:

a matching processing section that performs a matching process between the plurality of image signal regions;

an image integration section that integrates the plurality of image signal regions for which positioning has been performed by the matching processing section; and

a periodicity determination section that determines a periodicity of a pattern contained in the image signal regions for which an image integration is performed by the image integration section wherein the pattern configures a circuit of the semiconductor device,

wherein the periodicity determination section determines whether the pattern included in the image signal regions is a pattern having a periodicity in one direction, or a pattern having periodicities in plural directions, by using autocorrelation for the image signal regions, and when the pattern has a periodicity in one direction, periodicity data of the one direction is obtained, and when the pattern has periodicities in plural directions, periodicity data of the plural directions is obtained,

wherein the matching processing section narrows a search range of the matching in the one direction or in the plural directions, so that the periodicity of the pattern contained in the plurality of image signal regions disappears in accordance with a determination by the periodicity determination section, and calculates an amount of drift based on the matching process in the search range, and

the image integration section amends the amount of drift, and integrates signals in the plurality of image signal regions.

2. The image forming device according to claim 1 , wherein:

the periodicity determination section determines the presence or absence of the periodicity of the pattern; and

the matching processing section executes the matching by narrowing a predetermined image signal area when it is determined that there is periodicity in the pattern.

3. The image forming device according to claim 1 , wherein the periodicity determination section determines the periodicity based on an autocorrelation process of the image signals obtained by the microscope.

4. The image forming device according to claim 1 , wherein the periodicity determination section determines whether the pattern is present in a predetermined period.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Mar 30, 2020
From: HITACHI HIGH-TECHNOLOGIES CORPORATION
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 052259/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2014
From: TAKASUGI, YASUNORI; SAKAI, KEI; YAMAGUCHI, SATORU; HIRAO, KAZUYUKI
To: HITACHI HIGH-TECHNOLOGIES CORPORATION
Reel/Frame 033490/0529 →
Priority Claims (1)
JP 2012-027963 · Feb 13, 2012 · national
Continuity (1)
Related Publication 20150002652A1 · Jan 1, 2015