Graphitic substrates with ceramic dielectric layers
Different kinds of printing pastes or inks are utilized in various combinations to develop multiple ceramic dielectric layers on graphitic substrates in order to create effective dielectric ceramic layers that combine good adhesion to both graphitic substrates and printed copper traces, and strong insulating capability. The pastes or inks may comprise a high thermal conductivity powder.
1. A structure for electrical circuitry comprising:
electrically conducting traces;
a graphitic substrate; and
a plurality of layers separating the electrically conducting traces from the graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers,
wherein the plurality of layers are a first silicon carbide layer deposited onto the graphitic substrate, a boron nitride layer deposited onto the first silicon carbide layer, and a second silicon carbide layer deposited onto the boron nitride layer, wherein the electrically conducting traces are deposited onto the second silicon carbide layer.
2. The structure as recited in claim 1 , wherein the electrically conducting traces comprise copper.
3. A structure for electrical circuitry comprising:
electrically conducting traces;
a graphitic substrate; and
a plurality of layers separating the electrically conducting traces from the graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers,
wherein the plurality of layers are a graphite layer deposited onto the graphitic substrate,
and an aluminum nitride layer deposited onto the graphite layer, wherein the electrically conducting traces are deposited onto the aluminum nitride layer.
4. The structure as recited in claim 3 , wherein the electrically conducting traces comprise copper.
5. A structure for electrical circuitry comprising:
electrically conducting traces;
a graphitic substrate; and
a plurality of layers separating the electrically conducting traces from the graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers,
wherein the plurality of different ceramic dielectric layers comprise a first silicon carbide layer deposited onto the graphitic substrate, a boron nitride layer deposited onto the first silicon carbide layer, and a second silicon carbide layer deposited onto the boron nitride layer, wherein the electrically conducting traces are deposited onto the second silicon carbide layer.
6. The structure as recited in claim 5 , wherein the electrically conducting traces comprise copper.
7. A structure for electrical circuitry comprising:
electrically conducting traces;
a graphitic substrate; and
a plurality of layers separating the electrically conducting traces from the graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers, wherein the graphite layer and the ceramic dielectric layer comprise the graphite layer deposited onto the graphitic substrate, and an aluminum nitride layer deposited onto the graphite layer, wherein the electrically conducting traces are deposited onto the aluminum nitride layer.
8. The structure as recited in claim 7 , wherein the electrically conducting traces comprise copper.
9. A method of making electrical circuitry comprising:
depositing a plurality of layers over a graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers; and
depositing electrically conducting traces on a top one of the plurality of layers, wherein depositing of the plurality of layers over the graphitic substrate comprises depositing a first silicon carbide layer onto the graphitic substrate, depositing a boron nitride layer onto the first silicon carbide layer, and depositing a second silicon carbide layer onto the boron nitride layer, wherein the electrically conducting traces are deposited onto the second silicon carbide layer.
10. The method as recited in claim 9 , wherein the electrically conducting traces comprise copper.
11. The method as recited in claim 10 , wherein the first and second silicon carbide layers are deposited as paste or ink formulations comprising silicon carbide powders, and
wherein the boron nitride layer is deposited as a paste or ink formulation comprising boron nitride powders.
12. A method of making electrical circuitry comprising:
depositing a plurality of layers over a graphitic substrate, wherein the plurality of layers are selected from the group consisting of:
(i) a plurality of different ceramic dielectric layers,
(ii) a graphitic layer and a ceramic dielectric layer, and
(iii) a graphitic layer and two or more different ceramic dielectric layers; and
depositing electrically conducting traces on a top one of the plurality of layers, wherein
depositing of the plurality of layers over the graphitic substrate comprises depositing a graphite layer onto the graphitic substrate, and depositing an aluminum nitride layer onto the graphite layer, wherein the electrically conducting traces are deposited onto the aluminum nitride layer.
13. The method as recited in claim 12 , wherein the electrically conducting traces comprise copper.
14. The method as recited in claim 13 , wherein the aluminum nitride layer is deposited as a paste or ink formulation comprising aluminum nitride powders, and
wherein the graphite layer is deposited as a paste or ink formulation comprising graphite powders.