Vertical high voltage semiconductor apparatus and fabrication method of vertical high voltage semiconductor apparatus
A silicon carbide vertical MOSFET includes an N-counter layer of a first conductivity type formed in a surface layer other than a second semiconductor layer base layer selectively formed in a low concentration layer on a surface of the substrate, a gate electrode layer formed through a gate insulating film in at least a portion of an exposed portion of a surface of a third semiconductor layer of a second conductivity type between a source region of the first conductivity type and the N-counter layer of the first conductivity type, and a source electrode in contact commonly with surfaces of the source region and the third semiconductor layer. Portions of the second conductivity type semiconductor layer are connected with each other in a region beneath the N-counter layer.
1. A vertical high voltage semiconductor apparatus comprising:
a semiconductor substrate of a first conductivity type;
a first semiconductor layer of the first conductivity type, formed on the semiconductor substrate and having an impurity concentration lower than that of the semiconductor substrate;
a second semiconductor layer of a second conductivity type, selectively formed on a surface of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor layer;
a base layer of the second conductivity type disposed on the first semiconductor layer and the second semiconductor layer;
a first conductivity type source region selectively formed in a surface layer of the base layer;
a second conductivity type contact region selectively formed in the surface layer of the base layer;
an N-counter layer of the first conductivity type formed to penetrate the base layer from a surface and reach the first semiconductor layer;
a gate electrode layer disposed on a gate insulating film; the gate insulating film being in direct contact with at least a portion of an exposed portion of a surface of the base layer between the source region and the N-counter layer;
a source electrode in contact commonly with surfaces of the source region and the base layer; and
a drain electrode disposed on a back face of the semiconductor substrate, wherein
portions of the second semiconductor layer are directly connected with each other in regions beneath the N-counter layer.
2. The vertical high voltage semiconductor apparatus according to claim 1 , wherein
each of said portions of the second semiconductor layer connected with each other in the regions beneath the N-counter layers are separated from respective PN-junctions formed by respective portions of the base layer and respective portions of the N-counter layer.
3. The vertical high voltage semiconductor apparatus according to claim 1 , wherein
a semiconductor material of the semiconductor substrate is silicon carbide.
4. The vertical high voltage semiconductor apparatus according to claim 3 , wherein
the crystallographic plane indices of the semiconductor substrate is a surface parallel to, or inclined by an angle within 10 degrees with respect thereto, a surface whose crystallographic plane indices are (000-1).
5. The vertical high voltage semiconductor apparatus according to claim 3 , wherein
the crystallographic plane indices of the semiconductor substrate is a surface parallel to, or inclined by an angle within 10 degrees with respect thereto, a surface whose crystallographic plane indices are (0001).
6. The vertical high voltage semiconductor apparatus according to claim 2 , wherein
a semiconductor material of the semiconductor substrate is silicon carbide.
7. The vertical high voltage semiconductor apparatus according to claim 6 , wherein
the crystallographic plane indices of the semiconductor substrate is a surface parallel to, or inclined by an angle within 10 degrees with respect thereto, a surface whose crystallographic plane indices are (000-1).
8. The vertical high voltage semiconductor apparatus according to claim 6 , wherein
the crystallographic plane indices of the semiconductor substrate is a surface parallel to, or inclined by an angle within 10 degrees with respect thereto, a surface whose crystallographic plane indices are (0001).
9. The vertical high voltage semiconductor apparatus according to claim 1 , wherein the semiconductor substrate is doped with a nitrogen impurity at a concentration of about 2×10 19 cm −3 .